dmac_flock: Test AXI DMAC Framelock feature

Verify the framelock when the writer is faster than the reader and vice-versa. Test with delay and in AutoRun mode. Signed-off-by: Jorge Marques <[email protected]>
analogdevicesinc · Oct 16, 2024 · cc87d7e · cc87d7e
1 parent 81fedd0
commit cc87d7e
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Showing 19 changed files with 1,807 additions and 17 deletions.
diff --git a/common/sv/io_vip/Makefile → library/vip/adi/io_vip/Makefile b/common/sv/io_vip/Makefile → library/vip/adi/io_vip/Makefile
@@ -11,4 +11,4 @@ GENERIC_DEPS += io_vip_if.sv
 XILINX_DEPS += io_vip_ip.tcl
 XILINX_DEPS += io_vip_pkg.ttcl
 
-include ../../../../library/scripts/library.mk
+include ../../../../../library/scripts/library.mk
diff --git a/common/sv/io_vip/io_vip.sv → library/vip/adi/io_vip/io_vip.sv b/common/sv/io_vip/io_vip.sv → library/vip/adi/io_vip/io_vip.sv
@@ -1,6 +1,6 @@
 // ***************************************************************************
 // ***************************************************************************
-// Copyright 2014 - 2018 (c) Analog Devices, Inc. All rights reserved.
+// Copyright 2024 (c) Analog Devices, Inc. All rights reserved.
 //
 // In this HDL repository, there are many different and unique modules, consisting
 // of various HDL (Verilog or VHDL) components. The individual modules are
@@ -34,12 +34,12 @@
 // ***************************************************************************
 
 module io_vip #(
-  parameter MODE = 1, // 1 - driver, 0 - monitor
+  parameter MODE = 1, // 1 - master, 0 - slave
   parameter WIDTH = 1
 )(
   input  clk,
-  input  in,
-  output out
+  input  [WIDTH-1:0] in,
+  output [WIDTH-1:0] out
 );
 
   io_vip_if #(
@@ -49,9 +49,8 @@ module io_vip #(
     .clk(clk)
   );
 
-  generate if (MODE) begin
-    assign out = IF.io;
-  end else begin
+  assign out = IF.io;
+  generate if (~MODE) begin
     assign IF.io = in;
   end
   endgenerate

diff --git a/common/sv/io_vip/io_vip_if.sv → library/vip/adi/io_vip/io_vip_if.sv b/common/sv/io_vip/io_vip_if.sv → library/vip/adi/io_vip/io_vip_if.sv
@@ -1,6 +1,6 @@
 // ***************************************************************************
 // ***************************************************************************
-// Copyright 2014 - 2024 (c) Analog Devices, Inc. All rights reserved.
+// Copyright 2024 (c) Analog Devices, Inc. All rights reserved.
 //
 // In this HDL repository, there are many different and unique modules, consisting
 // of various HDL (Verilog or VHDL) components. The individual modules are
@@ -34,18 +34,18 @@
 // ***************************************************************************
 
 interface io_vip_if #(
-  int MODE = 0, // 1 - driver, 0 - monitor
+  int MODE = 0, // 1 - master, 0 - slave
       WIDTH = 1
 ) (
   input bit clk
 );
 
   logic [WIDTH-1:0] io = 0;
 
-  // Driver functions
+  // Master functions
   function void set_io(int o);
     if (MODE === 0) begin
-      $display("[ERROR] %0t Unsupported in monitor mode", $time);
+      $display("[ERROR] %0t Unsupported in slave mode", $time);
       $finish;
     end else begin
       io <= o[WIDTH-1:0];
@@ -58,7 +58,7 @@ interface io_vip_if #(
     set_io(o);
   endtask
 
-  // Monitor functions
+  // Slave functions
   function int get_io();
     return io;
   endfunction

diff --git a/common/sv/io_vip/io_vip_ip.tcl → library/vip/adi/io_vip/io_vip_ip.tcl b/common/sv/io_vip/io_vip_ip.tcl → library/vip/adi/io_vip/io_vip_ip.tcl
@@ -3,7 +3,7 @@
 ### SPDX short identifier: ADIBSD
 ###############################################################################
 
-source ../../../../scripts/adi_env.tcl
+source ../../../../../scripts/adi_env.tcl
 source $ad_hdl_dir/library/scripts/adi_ip_xilinx.tcl
 
 adi_ip_create io_vip
@@ -22,8 +22,6 @@ ipx::remove_all_bus_interface [ipx::current_core]
 
 adi_set_ports_dependency "in" \
       "(spirit:decode(id('MODELPARAM_VALUE.MODE')) = 0)"
-adi_set_ports_dependency "out" \
-      "(spirit:decode(id('MODELPARAM_VALUE.MODE')) = 1)"
 
 set cc [ipx::current_core]
 

diff --git a/common/sv/io_vip/io_vip_pkg.ttcl → library/vip/adi/io_vip/io_vip_pkg.ttcl b/common/sv/io_vip/io_vip_pkg.ttcl → library/vip/adi/io_vip/io_vip_pkg.ttcl
@@ -1,5 +1,5 @@
 ###############################################################################
-## Copyright (C) 2018-2024 Analog Devices, Inc. All rights reserved.
+## Copyright (C) 2024 Analog Devices, Inc. All rights reserved.
 # SPDX short identifier: ADIBSD
 ###############################################################################
 

diff --git a/testbenches/ip/dma_flock/Makefile b/testbenches/ip/dma_flock/Makefile
@@ -0,0 +1,63 @@
+####################################################################################
+####################################################################################
+## Copyright (C) 2024 Analog Devices, Inc.
+####################################################################################
+####################################################################################
+
+# All test-bench dependencies except test programs
+SV_DEPS += ../../../library/utilities/utils.svh
+SV_DEPS += ../../../library/drivers/dmac/dma_trans.sv
+SV_DEPS += ../../../library/utilities/logger_pkg.sv
+SV_DEPS += ../../../library/regmaps/reg_accessor.sv
+SV_DEPS += ../../../library/vip/amd/m_axis_sequencer.sv
+SV_DEPS += ../../../library/vip/amd/s_axis_sequencer.sv
+SV_DEPS += ../../../library/vip/amd/m_axi_sequencer.sv
+SV_DEPS += ../../../library/vip/amd/s_axi_sequencer.sv
+SV_DEPS += ../../../library/drivers/dmac/dmac_api.sv
+SV_DEPS += ../../../library/regmaps/adi_regmap_pkg.sv
+SV_DEPS += ../../../library/regmaps/adi_regmap_dmac_pkg.sv
+SV_DEPS += ../../../library/drivers/dmac/dma_trans.sv
+SV_DEPS += ../../../library/utilities/test_harness_env.sv
+SV_DEPS += ../../../library/regmaps/adi_peripheral_pkg.sv
+SV_DEPS += environment.sv
+SV_DEPS += scoreboard.sv
+SV_DEPS += system_tb.sv
+
+ENV_DEPS += system_project.tcl
+ENV_DEPS += system_bd.tcl
+ENV_DEPS +=../../../scripts/adi_sim.tcl
+ENV_DEPS +=../../../scripts/run_sim.tcl
+
+LIB_DEPS := axi_dmac
+SIM_LIB_DEPS := io_vip
+
+# default test program
+TP := test_program
+
+# config files should have the following format
+#  cfg_<param1>_<param2>.tcl
+CFG_FILES := $(notdir $(wildcard cfgs/cfg*.tcl))
+#$(warning $(CFG_FILES))
+
+# List of tests and configuration combinations that has to be run
+# Format is:  <configuration>:<test name>
+#TESTS := $(foreach cfg, $(basename $(CFG_FILES)), $(cfg):$(TP))
+TESTS += cfg1:test_program
+TESTS += cfg2_fsync:test_program
+TESTS += cfg2_fsync:test_program_frame_delay
+TESTS += cfg3_fsync_autorun:test_program_frame_delay
+
+include ../../../scripts/project-sim.mk
+
+# usage :
+#
+# run specific test on a specific configuration in gui mode
+# 	make CFG=cfg2_fsync TST=test_program_frame_delay MODE=gui
+#
+# run all test from a configuration
+# 	make cfg1_mm2mm_default
+
+
+
+####################################################################################
+####################################################################################
diff --git a/testbenches/ip/dma_flock/cfgs/cfg1.tcl b/testbenches/ip/dma_flock/cfgs/cfg1.tcl
@@ -0,0 +1,65 @@
+set MAX_NUM_FRAMES 8
+set AUTORUN 0
+set USE_EXT_SYNC 0
+set TDATA_NUM_BYTES 8
+
+set ad_project_params(M_DMA_CFG_MAX_NUM_FRAMES) $MAX_NUM_FRAMES
+set ad_project_params(M_DMA_CFG_AUTORUN) $AUTORUN
+set ad_project_params(S_DMA_CFG_AUTORUN) $AUTORUN
+set ad_project_params(M_DMA_CFG_USE_EXT_SYNC) $USE_EXT_SYNC
+set ad_project_params(S_DMA_CFG_USE_EXT_SYNC) $USE_EXT_SYNC
+set ad_project_params(SRC_AXIS_VIP_CFG_TDATA_NUM_BYTES) $TDATA_NUM_BYTES
+set ad_project_params(DST_AXIS_VIP_CFG_TDATA_NUM_BYTES) $TDATA_NUM_BYTES
+
+set m_dma_cfg [list \
+   DMA_TYPE_SRC 1 \
+   DMA_TYPE_DEST 0 \
+   DMA_2D_TRANSFER 1 \
+   SYNC_TRANSFER_START 0 \
+   AXIS_TUSER_SYNC 0 \
+   CYCLIC 1 \
+   FRAMELOCK 1 \
+   MAX_NUM_FRAMES $MAX_NUM_FRAMES \
+   USE_EXT_SYNC $USE_EXT_SYNC \
+   DMA_2D_TLAST_MODE 1 \
+]
+
+set s_dma_cfg [list \
+   DMA_TYPE_SRC 0 \
+   DMA_TYPE_DEST 1 \
+   DMA_2D_TRANSFER 1 \
+   SYNC_TRANSFER_START 0 \
+   AXIS_TUSER_SYNC 0 \
+   CYCLIC 1 \
+   FRAMELOCK 1 \
+   MAX_NUM_FRAMES $MAX_NUM_FRAMES \
+   USE_EXT_SYNC $USE_EXT_SYNC \
+   DMA_2D_TLAST_MODE 1 \
+]
+
+# VDMA config
+set vdma_cfg [list \
+ c_m_axis_mm2s_tdata_width {64} \
+ c_num_fstores {3} \
+ c_use_mm2s_fsync {0} \
+ c_use_s2mm_fsync {0} \
+ c_enable_vert_flip {0} \
+ c_mm2s_genlock_mode {3} \
+ c_s2mm_genlock_mode {2} \
+ c_mm2s_linebuffer_depth {8192} \
+ c_s2mm_linebuffer_depth {8192} \
+]
+
+# SRC AXIS
+set src_axis_vip_cfg [list \
+   INTERFACE_MODE {MASTER} \
+   HAS_TLAST {1} \
+   TDATA_NUM_BYTES $TDATA_NUM_BYTES \
+  ]
+
+# DST AXIS
+set dst_axis_vip_cfg [list \
+   INTERFACE_MODE {SLAVE} \
+   HAS_TLAST {1} \
+   TDATA_NUM_BYTES $TDATA_NUM_BYTES \
+]
diff --git a/testbenches/ip/dma_flock/cfgs/cfg2_fsync.tcl b/testbenches/ip/dma_flock/cfgs/cfg2_fsync.tcl
@@ -0,0 +1,66 @@
+set MAX_NUM_FRAMES 8
+set AUTORUN 0
+set M_USE_EXT_SYNC 0
+set S_USE_EXT_SYNC 1
+set TDATA_NUM_BYTES 8
+
+set ad_project_params(M_DMA_CFG_MAX_NUM_FRAMES) $MAX_NUM_FRAMES
+set ad_project_params(M_DMA_CFG_AUTORUN) $AUTORUN
+set ad_project_params(S_DMA_CFG_AUTORUN) $AUTORUN
+set ad_project_params(M_DMA_CFG_USE_EXT_SYNC) $M_USE_EXT_SYNC
+set ad_project_params(S_DMA_CFG_USE_EXT_SYNC) $S_USE_EXT_SYNC
+set ad_project_params(SRC_AXIS_VIP_CFG_TDATA_NUM_BYTES) $TDATA_NUM_BYTES
+set ad_project_params(DST_AXIS_VIP_CFG_TDATA_NUM_BYTES) $TDATA_NUM_BYTES
+
+set m_dma_cfg [list \
+   DMA_TYPE_SRC 1 \
+   DMA_TYPE_DEST 0 \
+   DMA_2D_TRANSFER 1 \
+   SYNC_TRANSFER_START 0 \
+   AXIS_TUSER_SYNC 0 \
+   CYCLIC 1 \
+   FRAMELOCK 1 \
+   MAX_NUM_FRAMES $MAX_NUM_FRAMES \
+   USE_EXT_SYNC $M_USE_EXT_SYNC \
+   SYNC_TRANSFER_START 1 \
+   DMA_2D_TLAST_MODE 1 \
+]
+
+set s_dma_cfg [list \
+   DMA_TYPE_SRC {0} \
+   DMA_TYPE_DEST {1} \
+   DMA_2D_TRANSFER 1 \
+   SYNC_TRANSFER_START 0 \
+   AXIS_TUSER_SYNC 0 \
+   CYCLIC 1 \
+   FRAMELOCK 1 \
+   MAX_NUM_FRAMES $MAX_NUM_FRAMES \
+   USE_EXT_SYNC $S_USE_EXT_SYNC \
+   DMA_2D_TLAST_MODE 1 \
+]
+
+# VDMA config
+set vdma_cfg [list \
+ c_m_axis_mm2s_tdata_width {64} \
+ c_num_fstores {8} \
+ c_use_mm2s_fsync {1} \
+ c_use_s2mm_fsync {2} \
+ c_enable_vert_flip {0} \
+ c_mm2s_genlock_mode {1} \
+ c_s2mm_genlock_mode {0} \
+]
+
+# SRC AXIS
+set src_axis_vip_cfg [list \
+   INTERFACE_MODE {MASTER} \
+   HAS_TLAST {1} \
+   TUSER_WIDTH {1} \
+   TDATA_NUM_BYTES $TDATA_NUM_BYTES \
+  ]
+
+# DST AXIS
+set dst_axis_vip_cfg [list \
+   INTERFACE_MODE {SLAVE} \
+   HAS_TLAST {1} \
+   TDATA_NUM_BYTES $TDATA_NUM_BYTES \
+]
diff --git a/testbenches/ip/dma_flock/cfgs/cfg3_fsync_autorun.tcl b/testbenches/ip/dma_flock/cfgs/cfg3_fsync_autorun.tcl
@@ -0,0 +1,89 @@
+set MAX_NUM_FRAMES 8
+set AUTORUN 1
+set M_USE_EXT_SYNC 0
+set S_USE_EXT_SYNC 1
+set TDATA_NUM_BYTES 8
+
+set ad_project_params(M_DMA_CFG_MAX_NUM_FRAMES) $MAX_NUM_FRAMES
+set ad_project_params(M_DMA_CFG_AUTORUN) $AUTORUN
+set ad_project_params(S_DMA_CFG_AUTORUN) $AUTORUN
+set ad_project_params(M_DMA_CFG_USE_EXT_SYNC) $M_USE_EXT_SYNC
+set ad_project_params(S_DMA_CFG_USE_EXT_SYNC) $S_USE_EXT_SYNC
+set ad_project_params(SRC_AXIS_VIP_CFG_TDATA_NUM_BYTES) $TDATA_NUM_BYTES
+set ad_project_params(DST_AXIS_VIP_CFG_TDATA_NUM_BYTES) $TDATA_NUM_BYTES
+
+set m_dma_cfg [list \
+   DMA_TYPE_SRC 1 \
+   DMA_TYPE_DEST 0 \
+   DMA_2D_TRANSFER 1 \
+   SYNC_TRANSFER_START 0 \
+   AXIS_TUSER_SYNC 0 \
+   CYCLIC 1 \
+   FRAMELOCK 1 \
+   MAX_NUM_FRAMES $MAX_NUM_FRAMES \
+   USE_EXT_SYNC $M_USE_EXT_SYNC \
+   SYNC_TRANSFER_START 1 \
+   DMA_2D_TLAST_MODE {1} \
+   \
+   AUTORUN                  $AUTORUN \
+   AUTORUN_FLAGS            {0x13} \
+   AUTORUN_SRC_ADDR         {0x00000000} \
+   AUTORUN_DEST_ADDR        {0x00001000} \
+   AUTORUN_X_LENGTH         {0x3FF} \
+   AUTORUN_Y_LENGTH         {0x7} \
+   AUTORUN_SRC_STRIDE       {0x000} \
+   AUTORUN_DEST_STRIDE      {0x400} \
+   AUTORUN_FRAMELOCK_CONFIG {0x00303} \
+   AUTORUN_FRAMELOCK_STRIDE {0x2000} \
+]
+
+set s_dma_cfg [list \
+   DMA_TYPE_SRC {0} \
+   DMA_TYPE_DEST {1} \
+   DMA_2D_TRANSFER 1 \
+   SYNC_TRANSFER_START 0 \
+   AXIS_TUSER_SYNC 0 \
+   CYCLIC 1 \
+   FRAMELOCK 1 \
+   MAX_NUM_FRAMES $MAX_NUM_FRAMES \
+   USE_EXT_SYNC $S_USE_EXT_SYNC \
+   DMA_2D_TLAST_MODE {1} \
+   \
+   AUTORUN                  $AUTORUN \
+   AUTORUN_FLAGS            {0x13} \
+   AUTORUN_SRC_ADDR         {0x00001000} \
+   AUTORUN_DEST_ADDR        {0x00000000} \
+   AUTORUN_X_LENGTH         {0x3FF} \
+   AUTORUN_Y_LENGTH         {0x7} \
+   AUTORUN_SRC_STRIDE       {0x000} \
+   AUTORUN_DEST_STRIDE      {0x400} \
+   AUTORUN_FRAMELOCK_CONFIG {0x00303} \
+   AUTORUN_FRAMELOCK_STRIDE {0x2000} \
+]
+
+
+# VDMA config
+set vdma_cfg [list \
+ c_m_axis_mm2s_tdata_width {64} \
+ c_num_fstores {8} \
+ c_use_mm2s_fsync {1} \
+ c_use_s2mm_fsync {2} \
+ c_enable_vert_flip {0} \
+ c_mm2s_genlock_mode {1} \
+ c_s2mm_genlock_mode {0} \
+]
+
+# SRC AXIS
+set src_axis_vip_cfg [list \
+   INTERFACE_MODE {MASTER} \
+   HAS_TLAST {1} \
+   TUSER_WIDTH {1} \
+   TDATA_NUM_BYTES $TDATA_NUM_BYTES \
+  ]
+
+# DST AXIS
+set dst_axis_vip_cfg [list \
+   INTERFACE_MODE {SLAVE} \
+   HAS_TLAST {1} \
+   TDATA_NUM_BYTES $TDATA_NUM_BYTES \
+]