library: io_vip: Add basic I/O VIP

A VIP to drive or receive an I/O, the direction is configured by a parameter. Signed-off-by: Jorge Marques <[email protected]>
analogdevicesinc · Jul 17, 2024 · dcc84cd · dcc84cd
1 parent b1a620b
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diff --git a/common/sv/io_vip/Makefile b/common/sv/io_vip/Makefile
@@ -0,0 +1,14 @@
+####################################################################################
+## Copyright (c) 2018 - 2024 Analog Devices, Inc.
+## Auto-generated, do not modify!
+####################################################################################
+
+LIBRARY_NAME := io_vip
+
+GENERIC_DEPS += io_vip.sv
+GENERIC_DEPS += io_vip_if.sv
+
+XILINX_DEPS += io_vip_ip.tcl
+XILINX_DEPS += io_vip_pkg.ttcl
+
+include ../../../../library/scripts/library.mk
diff --git a/common/sv/io_vip/io_vip.sv b/common/sv/io_vip/io_vip.sv
@@ -0,0 +1,59 @@
+// ***************************************************************************
+// ***************************************************************************
+// Copyright 2014 - 2018 (c) Analog Devices, Inc. All rights reserved.
+//
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsibilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
+// WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
+// A PARTICULAR PURPOSE.
+//
+// Redistribution and use of source or resulting binaries, with or without modification
+// of this file, are permitted under one of the following two license terms:
+//
+//   1. The GNU General Public License version 2 as published by the
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//
+// OR
+//
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
+//      https://github.com/analogdevicesinc/hdl/blob/main/LICENSE_ADIBSD
+//      This will allow to generate bit files and not release the source code,
+//      as long as it attaches to an ADI device.
+//
+// ***************************************************************************
+// ***************************************************************************
+
+module io_vip #(
+  parameter MODE = 1, // 1 - driver, 0 - monitor
+  parameter WIDTH = 1
+)(
+  input  clk,
+  input  in,
+  output out
+);
+
+  io_vip_if #(
+    .MODE (MODE),
+    .WIDTH (WIDTH)
+  ) IF (
+    .clk(clk)
+  );
+
+  generate if (MODE) begin
+    assign out = IF.io;
+  end else begin
+    assign IF.io = in;
+  end
+  endgenerate
+
+endmodule
diff --git a/common/sv/io_vip/io_vip_if.sv b/common/sv/io_vip/io_vip_if.sv
@@ -0,0 +1,75 @@
+// ***************************************************************************
+// ***************************************************************************
+// Copyright 2014 - 2024 (c) Analog Devices, Inc. All rights reserved.
+//
+// In this HDL repository, there are many different and unique modules, consisting
+// of various HDL (Verilog or VHDL) components. The individual modules are
+// developed independently, and may be accompanied by separate and unique license
+// terms.
+//
+// The user should read each of these license terms, and understand the
+// freedoms and responsibilities that he or she has by using this source/core.
+//
+// This core is distributed in the hope that it will be useful, but WITHOUT ANY
+// WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
+// A PARTICULAR PURPOSE.
+//
+// Redistribution and use of source or resulting binaries, with or without modification
+// of this file, are permitted under one of the following two license terms:
+//
+//   1. The GNU General Public License version 2 as published by the
+//      Free Software Foundation, which can be found in the top level directory
+//      of this repository (LICENSE_GPL2), and also online at:
+//      <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
+//
+// OR
+//
+//   2. An ADI specific BSD license, which can be found in the top level directory
+//      of this repository (LICENSE_ADIBSD), and also on-line at:
+//      https://github.com/analogdevicesinc/hdl/blob/main/LICENSE_ADIBSD
+//      This will allow to generate bit files and not release the source code,
+//      as long as it attaches to an ADI device.
+//
+// ***************************************************************************
+// ***************************************************************************
+
+interface io_vip_if #(
+  int MODE = 0, // 1 - driver, 0 - monitor
+      WIDTH = 1
+) (
+  input bit clk
+);
+
+  logic [WIDTH-1:0] io = 0;
+
+  // Driver functions
+  function void set_io(int o);
+    if (MODE === 0) begin
+      $display("[ERROR] %0t Unsupported in monitor mode", $time);
+      $finish;
+    end else begin
+      io <= o[WIDTH-1:0];
+    end
+  endfunction
+
+  // Wait and set
+  task setw_io(int o, int w=1);
+    repeat(w) wait_posedge_clk();
+    set_io(o);
+  endtask
+
+  // Monitor functions
+  function int get_io();
+    return io;
+  endfunction
+
+  task wait_posedge_clk();
+    @(cb);
+  endtask
+
+  default clocking cb @(posedge clk);
+    default input #1step output #1ps;
+    inout io;
+  endclocking : cb
+
+endinterface
diff --git a/common/sv/io_vip/io_vip_ip.tcl b/common/sv/io_vip/io_vip_ip.tcl
@@ -0,0 +1,65 @@
+###############################################################################
+## Copyright (C) 2024 Analog Devices, Inc. All rights reserved.
+### SPDX short identifier: ADIBSD
+###############################################################################
+
+source ../../../../scripts/adi_env.tcl
+source $ad_hdl_dir/library/scripts/adi_ip_xilinx.tcl
+
+adi_ip_create io_vip
+adi_ip_files io_vip [list \
+  "io_vip.sv" \
+  "io_vip_if.sv" \
+]
+
+adi_ip_properties_lite io_vip
+adi_ip_sim_ttcl io_vip "io_vip_pkg.ttcl"
+
+# Remove all inferred interfaces
+ipx::remove_all_bus_interface [ipx::current_core]
+
+## Interface definitions
+
+adi_set_ports_dependency "in" \
+      "(spirit:decode(id('MODELPARAM_VALUE.MODE')) = 0)"
+adi_set_ports_dependency "out" \
+      "(spirit:decode(id('MODELPARAM_VALUE.MODE')) = 1)"
+
+set cc [ipx::current_core]
+
+## MODE
+set_property -dict [list \
+	"value_validation_type" "pairs" \
+	"value_validation_pairs" {"Monitor" 0 "Driver" 1} \
+] \
+[ipx::get_user_parameters MODE -of_objects $cc]
+
+## Customize IP Layout
+## Remove the automatically generated GUI page
+ipgui::remove_page -component $cc [ipgui::get_pagespec -name "Page 0" -component $cc]
+ipx::save_core [ipx::current_core]
+
+
+## Create general configuration page
+ipgui::add_page -name {IO VIP} -component [ipx::current_core] -display_name {IO VIP}
+set page0 [ipgui::get_pagespec -name "IO VIP" -component $cc]
+
+set general_group [ipgui::add_group -name "General Configuration" -component $cc \
+    -parent $page0 -display_name "General Configuration" ]
+
+ipgui::add_param -name "WIDTH" -component $cc -parent $general_group
+set_property -dict [list \
+  "display_name" "IO Width" \
+  "tooltip" "\[WIDTH\] Width of the IO" \
+] [ipgui::get_guiparamspec -name "WIDTH" -component $cc]
+
+
+ipgui::add_param -name "MODE" -component $cc -parent $general_group
+set_property -dict [list \
+  "display_name" "Mode" \
+  "tooltip" "\[MODE\] Set as output or input" \
+] [ipgui::get_guiparamspec -name "MODE" -component $cc]
+
+## Create and save the XGUI file
+ipx::create_xgui_files $cc
+ipx::save_core $cc
diff --git a/common/sv/io_vip/io_vip_pkg.ttcl b/common/sv/io_vip/io_vip_pkg.ttcl
@@ -0,0 +1,30 @@
+###############################################################################
+## Copyright (C) 2018-2024 Analog Devices, Inc. All rights reserved.
+# SPDX short identifier: ADIBSD
+###############################################################################
+
+<: :>
+<: set ComponentName [getComponentNameString] :>
+<: setOutputDirectory "./sim/" :>
+<: setFileName ${ComponentName}_pkg :>
+<: setFileExtension ".sv" :>
+<: set mode                 [get_property MODELPARAM_VALUE.MODE] :>
+<: set width                [get_property MODELPARAM_VALUE.WIDTH] :>
+
+<: proc b2i {b} { if {$b==true} {return 1} else {return 0}} :>
+///////////////////////////////////////////////////////////////////////////
+//NOTE: This file has been automatically generated by Vivado.
+///////////////////////////////////////////////////////////////////////////
+
+package <=: ComponentName :>_pkg;
+
+
+///////////////////////////////////////////////////////////////////////////
+// These parameters are named after the component for use in your verification
+// environment.
+///////////////////////////////////////////////////////////////////////////
+  parameter <=: ComponentName :>_VIP_MODE               = <=: b2i $mode :>;
+  parameter <=: ComponentName :>_VIP_WIDTH              = <=: $width :>;
+//////////////////////////////////////////////////////////////////////////
+
+endpackage : <=: ComponentName :>_pkg