Skip to content

Commit

Permalink
First round of review comments
Browse files Browse the repository at this point in the history
Signed-off-by: andyfox-rushc <[email protected]>
  • Loading branch information
andyfox-rushc committed Oct 31, 2024
1 parent 1b27603 commit 9c89a1a
Show file tree
Hide file tree
Showing 11 changed files with 60 additions and 52 deletions.
3 changes: 3 additions & 0 deletions src/dbSta/include/db_sta/dbNetwork.hh
Original file line number Diff line number Diff line change
Expand Up @@ -132,6 +132,7 @@ class dbNetwork : public ConcreteNetwork

dbNet* staToDb(const Net* net) const;
void staToDb(const Net* net, dbNet*& dnet, dbModNet*& modnet) const;
dbNet* flatNet(const Net* pin) const;

dbBTerm* staToDb(const Term* term) const;
void staToDb(const Term* term,
Expand Down Expand Up @@ -239,6 +240,8 @@ class dbNetwork : public ConcreteNetwork
Instance* instance(const Pin* pin) const override;
Net* net(const Pin* pin) const override;
void net(const Pin* pin, dbNet*& db_net, dbModNet*& db_modnet) const;
dbNet* flatNet(const Pin* pin) const;

Term* term(const Pin* pin) const override;
PortDirection* direction(const Pin* pin) const override;
VertexId vertexId(const Pin* pin) const override;
Expand Down
48 changes: 28 additions & 20 deletions src/dbSta/src/dbNetwork.cc
Original file line number Diff line number Diff line change
Expand Up @@ -1188,6 +1188,18 @@ Net* dbNetwork::net(const Pin* pin) const
return nullptr;
}

/*
Get the db net (flat net) for the pin
*/

dbNet* dbNetwork::flatNet(const Pin* pin) const
{
dbNet* db_net;
dbModNet* db_modnet;
net(pin, db_net, db_modnet);
return db_net;
}

/*
Get the dbnet or the moddbnet for a pin
Sometimes a pin can be hooked to both and we want to expose them
Expand Down Expand Up @@ -1234,16 +1246,7 @@ Term* dbNetwork::term(const Pin* pin) const
return dbToStaTerm(bterm);
}
if (moditerm) {
// get the mod bterm
std::string port_name_str = moditerm->getName();
size_t last_idx = port_name_str.find_last_of('/');
if (last_idx != string::npos) {
port_name_str = port_name_str.substr(last_idx + 1);
}
const char* port_name = port_name_str.c_str();
dbModInst* mod_inst = moditerm->getParent();
dbModule* module = mod_inst->getMaster();
dbModBTerm* mod_port = module->findModBTerm(port_name);
dbModBTerm* mod_port = moditerm->getChildModBTerm();
if (mod_port) {
Term* ret = dbToStaTerm(mod_port);
return ret;
Expand Down Expand Up @@ -2193,6 +2196,18 @@ dbNet* dbNetwork::staToDb(const Net* net) const
return reinterpret_cast<dbNet*>(const_cast<Net*>(net));
}

dbNet* dbNetwork::flatNet(const Net* net) const
{
if (net) {
dbObject* obj = reinterpret_cast<dbObject*>(const_cast<Net*>(net));
dbObjectType type = obj->getObjectType();
if (type == odb::dbNetObj) {
return static_cast<dbNet*>(obj);
}
}
return nullptr;
}

void dbNetwork::staToDb(const Net* net, dbNet*& dnet, dbModNet*& modnet) const
{
dnet = nullptr;
Expand Down Expand Up @@ -2851,16 +2866,9 @@ void PinModuleConnection::operator()(const Pin* pin)
(void) (bterm);
(void) (modbterm);
if (moditerm) {
std::string port_name_str = moditerm->getName();
size_t last_idx = port_name_str.find_last_of('/');
if (last_idx != string::npos) {
port_name_str = port_name_str.substr(last_idx + 1);
}
const char* port_name = port_name_str.c_str();
dbModInst* mod_inst = moditerm->getParent();
dbModule* module = mod_inst->getMaster();
if (module == target_module_) {
dest_modbterm_ = module->findModBTerm(port_name);
dbModBTerm* modbterm = moditerm->getChildModBTerm();
if (modbterm->getParent() == target_module_) {
dest_modbterm_ = modbterm;
}
}
}
Expand Down
18 changes: 17 additions & 1 deletion src/dbSta/src/dbReadVerilog.cc
Original file line number Diff line number Diff line change
Expand Up @@ -430,13 +430,29 @@ void Verilog2db::makeDbModule(
}
}
module->getModBTerms().reverse();
// make the instance iterms

// make the instance iterms and set up their reference
// to the child ports (dbModBTerms).

InstancePinIterator* ip_iter = network_->pinIterator(inst);
while (ip_iter->hasNext()) {
Pin* cur_pin = ip_iter->next();
std::string pin_name_string = network_->portName(cur_pin);
//
// we do not need to store the pin names.. But they are
// assumed to exist in the STA world.
//
dbModITerm* moditerm
= dbModITerm::create(modinst, pin_name_string.c_str());
dbModBTerm* modbterm;
std::string port_name_str = pin_name_string;
size_t last_idx = port_name_str.find_last_of('/');
if (last_idx != string::npos) {
port_name_str = port_name_str.substr(last_idx + 1);
}
dbModule* module = modinst->getMaster();
modbterm = module->findModBTerm(port_name_str.c_str());
moditerm->setChildModBTerm(modbterm);
(void) moditerm;
debugPrint(logger_,
utl::ODB,
Expand Down
2 changes: 1 addition & 1 deletion src/odb/include/odb/db.h
Original file line number Diff line number Diff line change
Expand Up @@ -8152,7 +8152,7 @@ class dbModNet : public dbObject
dbSet<dbBTerm> getBTerms();

const char* getName() const;
void reName(const char* new_name);
void rename(const char* new_name);
static dbModNet* getModNet(dbBlock* block, uint id);
static dbModNet* create(dbModule* parentModule, const char* name);
static void destroy(dbModNet*);
Expand Down
2 changes: 1 addition & 1 deletion src/odb/src/db/dbJournal.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -1634,7 +1634,7 @@ void dbJournal::undo_connectObject()
dbITerm* iterm = dbITerm::getITerm(_block, iterm_id);
uint net_id;
_log.pop(net_id);
// disconnects everything modnet and bnet)
// disconnects everything: modnet and dbnet
iterm->disconnect();
break;
}
Expand Down
7 changes: 4 additions & 3 deletions src/odb/src/db/dbModNet.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -230,13 +230,14 @@ const char* dbModNet::getName() const
//
// Support for renaming hierarchical nets
//
void dbModNet::reName(const char* new_name)
void dbModNet::rename(const char* new_name)
{
_dbModNet* obj = (_dbModNet*) this;
delete (obj->_name);
obj->_name = strdup(new_name);
_dbBlock* block = (_dbBlock*) obj->getOwner();
_dbModule* parent = block->_module_tbl->getPtr(obj->_parent);
parent->_modnet_hash.erase(obj->_name);
free(obj->_name);
obj->_name = strdup(new_name);
parent->_modnet_hash[new_name] = obj->getOID();
}

Expand Down
7 changes: 2 additions & 5 deletions src/rsz/src/EstimateWireParasitics.cc
Original file line number Diff line number Diff line change
Expand Up @@ -743,18 +743,15 @@ bool Resizer::isPad(const Instance* inst) const

void Resizer::parasiticsInvalid(const Net* net)
{
odb::dbNet* db_net = nullptr;
odb::dbModNet* db_modnet = nullptr;
db_network_->staToDb(net, db_net, db_modnet);

odb::dbNet* db_net = db_network_->flatNet(net);
if (haveEstimatedParasitics()) {
debugPrint(logger_,
RSZ,
"resizer_parasitics",
2,
"parasitics invalid {}",
network_->pathName(net));
parasitics_invalid_.insert(net);
parasitics_invalid_.insert(db_network_->dbToSta(db_net));
}
}

Expand Down
6 changes: 2 additions & 4 deletions src/rsz/src/OdbCallBack.cc
Original file line number Diff line number Diff line change
Expand Up @@ -150,10 +150,8 @@ void OdbCallBack::inDbInstSwapMasterAfter(dbInst* inst)
while (pin_iter->hasNext()) {
Pin* pin = pin_iter->next();
Net* net = network_->net(pin);
// we can only update parasitics for low level net
odb::dbNet* db_net = nullptr;
odb::dbModNet* db_modnet = nullptr;
db_network_->staToDb(net, db_net, db_modnet);
// we can only update parasitics for flat net
odb::dbNet* db_net = db_network_->flatNet(net);
resizer_->parasiticsInvalid(db_network_->dbToSta(db_net));
}
}
Expand Down
2 changes: 1 addition & 1 deletion src/rsz/src/Rebuffer.cc
Original file line number Diff line number Diff line change
Expand Up @@ -145,7 +145,7 @@ int RepairSetup::rebuffer(const Pin* drvr_pin)
//(the dbNet name now exposed is the same as the modnet name)
// so we uniquify the modnet name
std::string new_name = resizer_->makeUniqueNetName();
db_modnet->reName(new_name.c_str());
db_modnet->rename(new_name.c_str());
}

inserted_buffer_count = rebufferTopDown(best_option,
Expand Down
7 changes: 0 additions & 7 deletions src/rsz/src/RepairSetup.cc
Original file line number Diff line number Diff line change
Expand Up @@ -56,13 +56,6 @@
#include "sta/VerilogWriter.hh"
#include "utl/Logger.h"

/*void
writeVerilog(const char *filename,
bool sort,
bool include_pwr_gnd,
sta::CellSeq *remove_cells,
sta::Network *network);
*/
namespace rsz {

using std::max;
Expand Down
10 changes: 1 addition & 9 deletions src/rsz/src/SteinerTree.cc
Original file line number Diff line number Diff line change
Expand Up @@ -69,16 +69,8 @@ SteinerTree* Resizer::makeSteinerTree(const Pin* drvr_pin)
/*
Handle hierarchy. Make sure all traversal on dbNets.
*/
odb::dbITerm* iterm;
odb::dbBTerm* bterm;
odb::dbModITerm* moditerm;
odb::dbModBTerm* modbterm;

db_network_->staToDb(drvr_pin, iterm, bterm, moditerm, modbterm);

odb::dbNet* db_net;
odb::dbModNet* db_mod_net;
db_network_->net(drvr_pin, db_net, db_mod_net);
db_net = db_network_->flatNet(drvr_pin);

Net* net
= network_->isTopLevelPort(drvr_pin)
Expand Down

0 comments on commit 9c89a1a

Please sign in to comment.