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Switch stl components in hierarhical schema to native objects
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andyfox-rushc committed Feb 5, 2024
1 parent f889b5e commit a9628cc
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Showing 62 changed files with 3,625 additions and 379 deletions.
145 changes: 90 additions & 55 deletions src/dbSta/src/dbNetwork.cc
Original file line number Diff line number Diff line change
Expand Up @@ -134,10 +134,10 @@ class DbInstanceChildIterator : public InstanceChildIterator
dbModule* module_;
std::vector<dbModule*> child_modules_;
bool top_;
std::vector<odb::dbId<dbInst>>::iterator dbinst_iter_;
std::vector<odb::dbId<dbInst>>::iterator dbinst_end_;
std::vector<odb::dbId<dbModInst>>::iterator modinst_iter_;
std::vector<odb::dbId<dbModInst>>::iterator modinst_end_;
dbSet<dbInst>::iterator dbinst_iter_;
dbSet<dbInst>::iterator dbinst_end_;
dbSet<dbModInst>::iterator modinst_iter_;
dbSet<dbModInst>::iterator modinst_end_;
std::vector<dbModule*> candidate_modules_;
};

Expand All @@ -147,18 +147,18 @@ DbInstanceChildIterator::DbInstanceChildIterator(const Instance* instance,
{
dbBlock* block = network->block();
module_ = block->getTopModule();
modinst_iter_ = module_->getModInstVec().end();
modinst_iter_ = ((dbModule*) module_)->getModInsts().begin();
modinst_end_ = modinst_iter_;
dbinst_iter_ = module_->getDbInstVec().end();
dbinst_iter_ = ((dbModule*) module_)->getInsts().begin();
dbinst_end_ = dbinst_iter_;

if (instance == network->topInstance()) {
if (instance == network->topInstance() && block) {
module_ = block->getTopModule();
top_ = true;
modinst_iter_ = module_->getModInstVec().begin();
modinst_end_ = module_->getModInstVec().end();
dbinst_iter_ = module_->getDbInstVec().begin();
dbinst_end_ = module_->getDbInstVec().end();
modinst_iter_ = module_->getModInsts().begin();
modinst_end_ = module_->getModInsts().end();
dbinst_iter_ = module_->getInsts().begin();
dbinst_end_ = module_->getInsts().end();
#ifdef DEBUG_DBNW
printf("(top) Child iterator for instance %s\n", network_->name(instance));
printf("Number of db instances %u\n", module_->getDbInstCount());
Expand All @@ -172,10 +172,10 @@ DbInstanceChildIterator::DbInstanceChildIterator(const Instance* instance,
network->staToDb(instance, db_inst, mod_inst);
if (mod_inst) {
module_ = mod_inst->getMaster();
modinst_iter_ = module_->getModInstVec().begin();
modinst_end_ = module_->getModInstVec().end();
dbinst_iter_ = module_->getDbInstVec().begin();
dbinst_end_ = module_->getDbInstVec().end();
modinst_iter_ = module_->getModInsts().begin();
modinst_end_ = module_->getModInsts().end();
dbinst_iter_ = module_->getInsts().begin();
dbinst_end_ = module_->getInsts().end();
#ifdef DEBUG_DBNW
printf("(non-top/leaf)Child iterator for instance %s\n",
network_->name(instance));
Expand All @@ -199,11 +199,11 @@ Instance* DbInstanceChildIterator::next()
{
Instance* ret = nullptr;
if (dbinst_iter_ != dbinst_end_) {
dbInst* child = module_->getdbInst(*dbinst_iter_);
dbInst* child = *dbinst_iter_;
dbinst_iter_++;
ret = network_->dbToSta(child);
} else if (modinst_iter_ != modinst_end_) {
dbModInst* child = module_->getModInst(*modinst_iter_);
dbModInst* child = *modinst_iter_;
modinst_iter_++;
ret = network_->dbToSta(child);
}
Expand Down Expand Up @@ -271,8 +271,8 @@ class DbInstancePinIterator : public InstancePinIterator
dbSet<dbBTerm>::iterator bitr_;
dbSet<dbBTerm>::iterator bitr_end_;
// pins on a module instance
std::vector<odb::dbId<dbModITerm>>::iterator mi_itr_;
std::vector<odb::dbId<dbModITerm>>::iterator mi_itr_end_;
dbSet<dbModITerm>::iterator mi_itr_;
dbSet<dbModITerm>::iterator mi_itr_end_;

Pin* next_;
dbInst* db_inst_;
Expand All @@ -297,8 +297,8 @@ DbInstancePinIterator::DbInstancePinIterator(const Instance* inst,
iitr_ = db_inst_->getITerms().begin();
iitr_end_ = db_inst_->getITerms().end();
} else if (mod_inst_) {
mi_itr_ = mod_inst_->getPinVec().begin();
mi_itr_end_ = mod_inst_->getPinVec().end();
mi_itr_ = mod_inst_->getModITerms().begin();
mi_itr_end_ = mod_inst_->getModITerms().end();
}
}
}
Expand Down Expand Up @@ -326,7 +326,7 @@ bool DbInstancePinIterator::hasNext()
}

if (mi_itr_ != mi_itr_end_) {
dbModITerm* mod_iterm = mod_inst_->getdbModITerm(*mi_itr_);
dbModITerm* mod_iterm = *mi_itr_;
next_ = network_->dbToSta(mod_iterm);
mi_itr_++;
return true;
Expand Down Expand Up @@ -403,10 +403,22 @@ class DbNetTermIterator : public NetTermIterator
DbNetTermIterator::DbNetTermIterator(const Net* net, const dbNetwork* network)
: network_(network)
{
dbNet* dnet = network_->staToDb(net);
dbSet<dbBTerm> terms = dnet->getBTerms();
iter_ = terms.begin();
end_ = terms.end();
dbModNet* modnet = nullptr;
dbNet* dnet = nullptr;
network_->staToDb(net, dnet, modnet);
if (dnet && !modnet) {
dbSet<dbBTerm> terms = dnet->getBTerms();
iter_ = terms.begin();
end_ = terms.end();
} else if (modnet) {
dbSet<dbBTerm> terms = modnet->getBTerms();
iter_ = terms.begin();
end_ = terms.end();
} else {
dbSet<dbBTerm> terms;
iter_ = terms.begin();
end_ = terms.end();
}
}

bool DbNetTermIterator::hasNext()
Expand Down Expand Up @@ -512,7 +524,7 @@ class dbModulePortIterator : public CellPortIterator
virtual Port* next();

private:
std::vector<odb::dbId<dbModBTerm>>::iterator iter_;
dbSet<dbModBTerm>::iterator iter_;
const dbModule* module_;
const dbBlock* block_;
};
Expand All @@ -526,22 +538,21 @@ dbModulePortIterator::dbModulePortIterator(const dbModule* cell,
{
module_ = cell;
block_ = block;
iter_ = (const_cast<dbModule*>(cell))->getPortVec().begin();
iter_ = (const_cast<dbModule*>(cell))->getModBTerms().begin();
}

bool dbModulePortIterator::hasNext()
{
if (iter_ == (const_cast<dbModule*>(module_))->getPortVec().end())
if (iter_ == (const_cast<dbModule*>(module_))->getModBTerms().end())
return false;
return true;
}

Port* dbModulePortIterator::next()
{
if (iter_ == (const_cast<dbModule*>(module_))->getPortVec().end())
if (iter_ == (const_cast<dbModule*>(module_))->getModBTerms().end())
return nullptr;
dbModBTerm* modbterm
= (const_cast<dbModule*>(module_))->getdbModBTerm(*iter_);
dbModBTerm* modbterm = *iter_;
Port* ret = reinterpret_cast<Port*>(modbterm);
// advance to next
iter_++;
Expand Down Expand Up @@ -599,12 +610,8 @@ void dbNetwork::makeVerilogCell(Library* library, dbModInst* mod_inst)
#ifdef DEBUG_BUS
printf("Making verilog cell for %s\n", master->getName());
printf("Terms (modbterms) on master\n");
std::vector<odb::dbId<dbModBTerm>>::iterator modbterm_begin
= master->getPortVec().begin();
std::vector<odb::dbId<dbModBTerm>>::iterator modbterm_end
= master->getPortVec().end();
for (auto i = modbterm_begin; i != modbterm_end; i++) {
printf("ModBTerm: %s\n", master->getdbModBTerm(block_, *i)->getName());
for (auto i = master->getModBTerms()) {
printf("ModBTerm: %s\n", (*i)->getName());
}
#endif

Expand All @@ -616,12 +623,11 @@ void dbNetwork::makeVerilogCell(Library* library, dbModInst* mod_inst)
// Handle bus ports
std::map<std::string, dbModBTerm*> name2modbterm;

std::vector<odb::dbId<dbModBTerm>> local_array = master->getPortVec();
for (std::vector<odb::dbId<dbModBTerm>>::iterator modbterm_iter
= local_array.begin();
modbterm_iter != local_array.end();
for (dbSet<dbModBTerm>::iterator modbterm_iter
= master->getModBTerms().begin();
modbterm_iter != master->getModBTerms().end();
modbterm_iter++) {
dbModBTerm* modbterm = master->getdbModBTerm(block_, (*modbterm_iter));
dbModBTerm* modbterm = *modbterm_iter;
const char* port_name = modbterm->getName();
Port* port = ConcreteNetwork::makePort(local_cell, port_name);
PortDirection* dir = dbToSta(modbterm->getSigType(), modbterm->getIoType());
Expand Down Expand Up @@ -980,7 +986,9 @@ Net* dbNetwork::net(const Pin* pin) const
dbBTerm* bterm;
dbModITerm* moditerm;
dbModBTerm* modbterm;

#ifdef DEBUG_DBNW
printf("Getting net for pin %s\n", name(pin));
#endif
staToDb(pin, iterm, bterm, moditerm, modbterm);
if (iterm) {
dbNet* dnet = iterm->getNet();
Expand Down Expand Up @@ -1084,8 +1092,8 @@ Port* dbNetwork::port(const Pin* pin) const
const char* port_name = port_name_str.c_str();
dbModInst* mod_inst = moditerm->getParent();
dbModule* module = mod_inst->getMaster();
dbModBTerm* mod_port = nullptr;
if (module->findModBTerm(port_name, mod_port)) {
dbModBTerm* mod_port = module->findModBTerm(port_name);
if (mod_port) {
ret = dbToSta(mod_port);
return ret;
}
Expand Down Expand Up @@ -1354,14 +1362,41 @@ void dbNetwork::visitConnectedPins(const Net* net,
PinVisitor& visitor,
NetSet& visited_nets) const
{
dbNet* db_net = staToDb(net);
for (dbITerm* iterm : db_net->getITerms()) {
Pin* pin = dbToSta(iterm);
visitor(pin);
}
for (dbBTerm* bterm : db_net->getBTerms()) {
Pin* pin = dbToSta(bterm);
visitor(pin);
static int debug;
debug++;

dbNet* db_net = nullptr;
dbModNet* mod_net = nullptr;
staToDb(net, db_net, mod_net);

if (db_net && !mod_net) {
for (dbITerm* iterm : db_net->getITerms()) {
Pin* pin = dbToSta(iterm);
visitor(pin);
debug++;
}
for (dbBTerm* bterm : db_net->getBTerms()) {
Pin* pin = dbToSta(bterm);
visitor(pin);
debug++;
}
} else if (mod_net) {
for (dbITerm* iterm : mod_net->getITerms()) {
Pin* pin = dbToSta(iterm);
visitor(pin);
debug++;
}
for (dbBTerm* bterm : mod_net->getBTerms()) {
Pin* pin = dbToSta(bterm);
visitor(pin);
debug++;
}

for (dbModITerm* moditerm : mod_net->getModITerms()) {
Pin* pin = dbToSta(moditerm);
visitor(pin);
debug++;
}
}
}

Expand Down Expand Up @@ -2103,7 +2138,7 @@ void dbNetwork::staToDb(const Port* port,
mterm = staToDb(port);
return;
} else {
if (module->findModBTerm(name(port), modbterm)) {
if (module->findModBTerm(name(port))) {
return;
}
}
Expand Down
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