Work in progress: 1st cut of top level port rebuffering. Entire flow …

…for gcd up to cts

Signed-off-by: andyfox-rushc <[email protected]>

src/dbSta/include/db_sta/dbNetwork.hh

@@ -159,6 +159,7 @@ class dbNetwork : public ConcreteNetwork
   Instance* dbToSta(dbInst* inst) const;
   Net* dbToSta(dbNet* net) const;
   const Net* dbToSta(const dbNet* net) const;
+  const Net* dbToSta(const dbModNet* net) const;
   Cell* dbToSta(dbMaster* master) const;
   Port* dbToSta(dbMTerm* mterm) const;
 
@@ -256,6 +257,8 @@ class dbNetwork : public ConcreteNetwork
   ////////////////////////////////////////////////////////////////
   // Terminal functions
   Net* net(const Term* term) const override;
+  dbNet* flatNet(const Term* term) const;
+  dbModNet* hierNet(const Term* term) const;
   Pin* pin(const Term* term) const override;
   ObjectId id(const Term* term) const override;
 

src/dbSta/src/dbNetwork.cc

@@ -1670,6 +1670,39 @@ Net* dbNetwork::net(const Term* term) const
   return nullptr;
 }
 
+dbNet* dbNetwork::flatNet(const Term* term) const
+{
+  dbITerm* iterm = nullptr;
+  dbBTerm* bterm = nullptr;
+  dbModITerm* moditerm = nullptr;
+  dbModBTerm* modbterm = nullptr;
+  staToDb(term, iterm, bterm, moditerm, modbterm);
+  if (bterm) {
+    dbNet* dnet = bterm->getNet();
+    if (dnet) {
+      return dnet;
+    }
+  }
+  return nullptr;
+}
+
+dbModNet* dbNetwork::hierNet(const Term* term) const
+{
+  dbBTerm* bterm = nullptr;
+  dbModBTerm* modbterm = nullptr;
+
+  if (modbterm) {
+    return modbterm->getModNet();
+  }
+  if (bterm) {
+    dbModNet* mod_net = bterm->getModNet();
+    if (mod_net) {
+      return mod_net;
+    }
+  }
+  return nullptr;
+}
+
 ////////////////////////////////////////////////////////////////
 
 bool dbNetwork::isLinked() const
@@ -2501,6 +2534,11 @@ const Net* dbNetwork::dbToSta(const dbNet* net) const
   return reinterpret_cast<const Net*>(net);
 }
 
+const Net* dbNetwork::dbToSta(const dbModNet* net) const
+{
+  return reinterpret_cast<const Net*>(net);
+}
+
 Pin* dbNetwork::dbToSta(dbBTerm* bterm) const
 {
   return reinterpret_cast<Pin*>(bterm);
@@ -2750,8 +2788,12 @@ bool DbNetworkPortMemberIterator::hasNext()
 Port* DbNetworkPortMemberIterator::next()
 {
   dbModBTerm* ret = *members_;
-  members_++;
   ix_++;
+  // if we are at the end, don't access the next member
+  // as it is null
+  if (ix_ != size_) {
+    members_++;
+  }
   return reinterpret_cast<Port*>(ret);
 }
 

src/dbSta/src/dbReadVerilog.cc

@@ -385,6 +385,7 @@ void Verilog2db::makeDbModule(
           bool updown = (from_index <= to_index) ? true : false;
           int size
               = updown ? to_index - from_index + 1 : from_index - to_index + 1;
+
           for (int i = 0; i < size; i++) {
             int ix = updown ? from_index + i : from_index - i;
             std::string bus_bit_port = port_name + std::string("[")

src/odb/src/db/dbBTerm.cpp

@@ -536,21 +536,32 @@ void dbBTerm::disconnect()
           net->_name);
     }
 
+    auto mnet_id = 0;
+    if (bterm->_mnet) {
+      _dbModNet* mod_net = block->_modnet_tbl->getPtr(bterm->_mnet);
+      mnet_id = mod_net->getOID();
+    }
+
     if (block->_journal) {
       debugPrint(block->getImpl()->getLogger(),
                  utl::ODB,
                  "DB_ECO",
                  1,
-                 "ECO: disconnect Iterm {}",
+                 "ECO: disconnect bterm {}",
                  bterm->getId());
       block->_journal->beginAction(dbJournal::DISCONNECT_OBJECT);
       block->_journal->pushParam(dbBTermObj);
       block->_journal->pushParam(bterm->getId());
       block->_journal->pushParam(net->getOID());
+      block->_journal->pushParam(mnet_id);
       block->_journal->endAction();
     }
 
     bterm->disconnectNet(bterm, block);
+
+    if (bterm->_mnet) {
+      bterm->disconnectModNet(bterm, block);
+    }
   }
 }
 

src/odb/src/db/dbJournal.cpp

@@ -1731,6 +1731,12 @@ void dbJournal::undo_disconnectObject()
       _log.pop(net_id);
       dbNet* net = dbNet::getNet(_block, net_id);
       bterm->connect(net);
+      uint mnet_id;
+      _log.pop(mnet_id);
+      if (mnet_id != 0) {
+        dbModNet* mnet = dbModNet::getModNet(_block, mnet_id);
+        bterm->connect(mnet);
+      }
       break;
     }
     default: {

src/odb/src/db/dbModNet.cpp

@@ -236,8 +236,9 @@ void dbModNet::rename(const char* new_name)
   _dbBlock* block = (_dbBlock*) obj->getOwner();
   _dbModule* parent = block->_module_tbl->getPtr(obj->_parent);
   parent->_modnet_hash.erase(obj->_name);
-  free(obj->_name);
+  free((void*) (obj->_name));
   obj->_name = strdup(new_name);
+  ZALLOCATED(obj->_name);
   parent->_modnet_hash[new_name] = obj->getOID();
 }
 

src/rsz/include/rsz/Resizer.hh

@@ -585,6 +585,7 @@ class Resizer : public dbStaState
   bool hasPins(Net* net);
   void getPins(Net* net, PinVector& pins) const;
   void getPins(Instance* inst, PinVector& pins) const;
+  void SwapNetNames(odb::dbITerm* iterm_to, odb::dbITerm* iterm_from);
   Point tieLocation(const Pin* load, int separation);
   bool hasFanout(Vertex* drvr);
   InstanceSeq findClkInverters();

src/rsz/src/EstimateWireParasitics.cc

@@ -374,7 +374,8 @@ bool Resizer::parasiticsValid() const
 
 void Resizer::ensureWireParasitic(const Pin* drvr_pin)
 {
-  const Net* net = network_->net(drvr_pin);
+  const Net* net = db_network_->dbToSta(db_network_->flatNet(drvr_pin));
+
   if (net) {
     ensureWireParasitic(drvr_pin, net);
   }

src/rsz/src/RepairDesign.cc

@@ -207,7 +207,8 @@ void RepairDesign::repairDesign(
     Pin* drvr_pin = drvr->pin();
     Net* net = network_->isTopLevelPort(drvr_pin)
                    ? network_->net(network_->term(drvr_pin))
-                   : network_->net(drvr_pin);
+                   // hier fix
+                   : db_network_->dbToSta(db_network_->flatNet(drvr_pin));
     dbNet* net_db = db_network_->staToDb(net);
     bool debug = (drvr_pin == resizer_->debug_pin_);
     if (debug) {

src/rsz/src/RepairSetup.cc

@@ -541,7 +541,7 @@ bool RepairSetup::repairPath(PathRef& path,
       const PathRef* drvr_path = expanded.path(drvr_index);
       Vertex* drvr_vertex = drvr_path->vertex(sta_);
       const Pin* drvr_pin = drvr_vertex->pin();
-      const Net* net = network_->net(drvr_pin);
+      const Net* net = db_network_->dbToSta(db_network_->flatNet(drvr_pin));
       LibertyPort* drvr_port = network_->libertyPort(drvr_pin);
       LibertyCell* drvr_cell = drvr_port ? drvr_port->libertyCell() : nullptr;
       const int fanout = this->fanout(drvr_vertex);