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PCIe/NVMe Driver #283
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PCIe/NVMe Driver #283
Commits on Nov 8, 2024
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Signed-off-by: julia <[email protected]>
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Signed-off-by: julia <[email protected]>
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Handle JH7110/PLDA pcie errata
Signed-off-by: julia <[email protected]>
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Remove leftover crud from previous example
Signed-off-by: julia <[email protected]>
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print 64 bit addresses if we have them
Signed-off-by: julia <[email protected]>
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add -Werror for compiling pcie driver
Signed-off-by: Ivan Velickovic <[email protected]>
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Signed-off-by: julia <[email protected]>
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Basic working NVMe queue ready
Signed-off-by: julia <[email protected]>
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Signed-off-by: julia <[email protected]>
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actually get admin queue commands working
Signed-off-by: julia <[email protected]>
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move nvme stuff (mostly) out of the pcie fifle
Signed-off-by: julia <[email protected]>
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working nvme queue abstraction?
Signed-off-by: julia <[email protected]>
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add poll command helper - still broken i/o submission queue
Signed-off-by: julia <[email protected]>
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figured out the issue... ish... but why??
Signed-off-by: julia <[email protected]>
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fix MPS; it's a log2-value not just a shifted by 2^12 value
turns out I was setting the "host page size" config bits incorrectly, specifying a required page size alignment of 2^13 (i.e. 0x2000, not 0x1000). the first queue was aligned to that, the second was not and was failing. at some point i tried using the same queu eaddress for creating both queues and that worked; so I went "is this some sort of alignment issue?" and went off diving into u-boot to discover it aligns dma buffers to 32bytes which didn't help since they were both page aligned anyway. anyway so i then just started progressively masking off higher and higher bits until the difference between 0x40283000 and 0x40282000 was that one bit and then i was like ??? wtf went scouring through nvme docs, only alignment i could find was dword aligned... then i realised that was mostly talking about PRP entries (scatter-gather list dma) meanwhile i was using just contiguous dma because easier, which references CC.MPS... which i then looked and i thought just doing PAGE_SIZE >> 12 seemed off cause 0x1000 >> 12 = 0x1 and 2^(12 + CC.MPS) is 2^13. and i realised it wanted a log2 value not a shifted value Signed-off-by: julia <[email protected]>
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Move debug code to separate header (for now?)
Signed-off-by: julia <[email protected]>
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yes this is a whole another specification
https://metebalci.com/blog/a-quick-tour-of-nvm-express-nvme/ Signed-off-by: julia <[email protected]>
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this traps with unimp :( Signed-off-by: julia <[email protected]>
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i spent way too long trying to figure out why this was trapping...
.. or being entirely optimised out https://cerberus.cl.cam.ac.uk/?short/cea8cb this is undefined behaviour. god I love C Signed-off-by: julia <[email protected]>
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use PRP entries as this is w hat they are
Signed-off-by: julia <[email protected]>
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qemu reading 0xfffff from nvme
Signed-off-by: julia <[email protected]>
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get back to original state on star64 (still not working tho)
Signed-off-by: julia <[email protected]>
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nvme regs on qemu have to be above 0x4000_0000
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remove unaligned reads & writes to doorbells
these are undefined by PCIe/NVMe specs Signed-off-by: julia <[email protected]>
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controller caps broken in qemu
Signed-off-by: julia <[email protected]>
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qemu interrupt-y style. I have no idea how this works (it only interr…
…upt sonce???? even though it should do forever???) https://www.mail-archive.com/[email protected]/msg931360.html might be this bug Signed-off-by: julia <[email protected]>
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ifdef the QEMU-specific behaviour
Signed-off-by: julia <[email protected]>
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interrupts work in QEMU, at least
Signed-off-by: julia <[email protected]>
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yes QEMU on riscv is broken in multiple ways
Signed-off-by: julia <[email protected]>
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Document all the weird behaviours?!??!
Signed-off-by: julia <[email protected]>
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set microkit sdk env var in zig build
Signed-off-by: julia <[email protected]>
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Signed-off-by: julia <[email protected]>
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Commits on Nov 12, 2024
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