Make banked memory read and write separately

src/memory/banked.rs

@@ -7,12 +7,12 @@ use super::{ActiveInterrupt, Memory, SystemInfo};
 /// address space. The active implementation is selected by external logic.
 pub struct BankedMemory {
   banks: Vec<Box<dyn Memory>>,
-  active: Rc<Cell<usize>>,
+  active: Rc<Cell<(usize, usize)>>,
 }
 
 impl BankedMemory {
   /// Create a new, empty banked memory.
-  pub fn new(active: Rc<Cell<usize>>) -> Self {
+  pub fn new(active: Rc<Cell<(usize, usize)>>) -> Self {
     Self {
       banks: Vec::new(),
       active,
@@ -29,16 +29,16 @@ impl BankedMemory {
 
 impl Memory for BankedMemory {
   fn read(&mut self, address: u16) -> u8 {
-    match self.banks.get_mut(self.active.get()) {
+    match self.banks.get_mut(self.active.get().0) {
       Some(memory) => memory.read(address),
-      None => panic!("Invalid bank {} selected", self.active.get()),
+      None => panic!("Invalid bank {} selected", self.active.get().0),
     }
   }
 
   fn write(&mut self, address: u16, value: u8) {
-    match self.banks.get_mut(self.active.get()) {
+    match self.banks.get_mut(self.active.get().1) {
       Some(memory) => memory.write(address, value),
-      None => panic!("Invalid bank {} selected", self.active.get()),
+      None => panic!("Invalid bank {} selected", self.active.get().1),
     }
   }
 

src/systems/aiie/mod.rs

@@ -241,8 +241,8 @@ impl SystemBuilder<AiieSystem, AiieSystemRoms, AiieSystemConfig> for AiieSystemB
         // Box::new(LoggingMemory::new(Box::new(io), "I/O", 0xC000)),
       )
       .map(0xC100, Box::new(rom));
-      //.map(0xD000, Box::new(applesoft_interpreter))
-      //.map(0xF800, Box::new(monitor));
+    //.map(0xD000, Box::new(applesoft_interpreter))
+    //.map(0xF800, Box::new(monitor));
 
     let cpu = Mos6502::new(Box::new(memory));
 
@@ -274,8 +274,6 @@ impl System for AiieSystem {
 
   #[allow(clippy::identity_op)]
   fn render(&mut self, framebuffer: &mut [u8], config: WindowConfig) {
-    let flash_state = ((self.cpu.get_info().cycle_count / 500_000) & 0b1) == 0;
-
     // https://retrocomputing.stackexchange.com/a/2541
     for index in 0x000..=0x3FF {
       let position = match index & 0x7F {

src/systems/c64/mod.rs

@@ -135,12 +135,12 @@ pub struct C64BankSwitching {
   charen: bool,
 
   /// Selectors to choose what is mapped in each memory region.
-  selectors: [Rc<Cell<usize>>; 6],
+  selectors: [Rc<Cell<(usize, usize)>>; 6],
 }
 
 impl C64BankSwitching {
-  pub fn new(mut selectors: [Rc<Cell<usize>>; 6]) -> Self {
-    selectors.iter_mut().for_each(|s| s.set(0));
+  pub fn new(mut selectors: [Rc<Cell<(usize, usize)>>; 6]) -> Self {
+    selectors.iter_mut().for_each(|s| s.set((0, 0)));
     Self {
       hiram: true,
       loram: true,
@@ -164,28 +164,32 @@ impl Port for C64BankSwitching {
     // TODO: EXROM, GAME signals
 
     // Region 2: RAM or inaccessible
-    self.selectors[0].set(0);
+    self.selectors[0].set((0, 0));
 
     // Region 3: RAM or Cartridge ROM Low
-    self.selectors[1].set(0);
+    self.selectors[1].set((0, 0));
 
     // Region 4: BASIC ROM, RAM, Cartridge ROM High, or inaccessible
-    self.selectors[2].set(if self.hiram && self.loram { 0 } else { 1 });
+    self.selectors[2].set(if self.hiram && self.loram {
+      (0, 0)
+    } else {
+      (1, 1)
+    });
 
     // Region 5: RAM or inaccessible
-    self.selectors[3].set(0);
+    self.selectors[3].set((0, 0));
 
     // Region 6: I/O, RAM, or character rom
     self.selectors[4].set(if !self.hiram && !self.loram {
-      1
+      (1, 1)
     } else if !self.charen {
-      2
+      (2, 2)
     } else {
-      0
+      (0, 0)
     });
 
     // Region 7: Kernal ROM or RAM
-    self.selectors[5].set(if !self.hiram { 1 } else { 0 });
+    self.selectors[5].set(if !self.hiram { (1, 1) } else { (0, 0) });
   }
 
   fn poll(&mut self, _cycles: u32, _info: &SystemInfo) -> bool {
@@ -223,33 +227,33 @@ impl SystemBuilder<C64System, C64SystemRoms, C64SystemConfig> for C64SystemBuild
     let region1 = BlockMemory::ram(0x1000);
 
     // Region 2: 0x1000 - 0x7FFF
-    let selector2 = Rc::new(Cell::new(0));
+    let selector2 = Rc::new(Cell::new((0, 0)));
     let region2 = BankedMemory::new(selector2.clone())
       .bank(Box::new(BlockMemory::ram(0x7000)))
       .bank(Box::new(NullMemory::new()));
 
     // Region 3: 0x8000 - 0x9FFF
-    let selector3 = Rc::new(Cell::new(0));
+    let selector3 = Rc::new(Cell::new((0, 0)));
     let region3 = BankedMemory::new(selector3.clone())
       .bank(Box::new(BlockMemory::ram(0x2000)))
       .bank(Box::new(NullMemory::new())); // TODO: Cartridge Rom Low
 
     // Region 4: 0xA000 - 0xBFFF
-    let selector4 = Rc::new(Cell::new(0));
+    let selector4 = Rc::new(Cell::new((0, 0)));
     let region4 = BankedMemory::new(selector4.clone())
       .bank(Box::new(BlockMemory::from_file(0x2000, roms.basic)))
       .bank(Box::new(BlockMemory::ram(0x2000)))
       .bank(Box::new(NullMemory::new())) // TODO: Cartridge Rom High
       .bank(Box::new(NullMemory::new()));
 
     // Region 5: 0xC000 - 0xCFFF
-    let selector5 = Rc::new(Cell::new(0));
+    let selector5 = Rc::new(Cell::new((0, 0)));
     let region5 = BankedMemory::new(selector5.clone())
       .bank(Box::new(BlockMemory::ram(0x1000)))
       .bank(Box::new(NullMemory::new()));
 
     // Region 6: 0xD000 - 0xDFFF
-    let selector6 = Rc::new(Cell::new(0));
+    let selector6 = Rc::new(Cell::new((0, 0)));
 
     let character_rom = BlockMemory::from_file(0x1000, roms.character.clone());
     let vic_ii = Rc::new(RefCell::new(VicIIChip::new(Box::new(character_rom))));
@@ -283,7 +287,7 @@ impl SystemBuilder<C64System, C64SystemRoms, C64SystemConfig> for C64SystemBuild
       .bank(Box::new(BlockMemory::from_file(0x1000, roms.character)));
 
     // Region 7: 0xE000 - 0xFFFF
-    let selector7 = Rc::new(Cell::new(0));
+    let selector7 = Rc::new(Cell::new((0, 0)));
     let region7 = BankedMemory::new(selector7.clone())
       .bank(Box::new(BlockMemory::from_file(0x2000, roms.kernal)))
       .bank(Box::new(BlockMemory::ram(0x2000)))