Increase coverage of pmp permission tests

Signed-off-by: Tomasz Michalak <[email protected]>
chipsalliance · Oct 9, 2024 · 0cc9805 · 0cc9805
1 parent 4be86d0
commit 0cc9805
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Showing 2 changed files with 6 additions and 1 deletion.
diff --git a/design/el2_pmp.sv b/design/el2_pmp.sv
@@ -25,7 +25,9 @@ module el2_pmp
 ) (
     input logic clk,       // Top level clock
     input logic rst_l,     // Reset
+    /* verilator coverage_off */
     input logic scan_mode, // Scan mode
+    /* verilator coverage_on */
 
 `ifdef RV_SMEPMP
     input el2_mseccfg_pkt_t mseccfg, // mseccfg CSR content, RLB, MMWP and MML bits
@@ -113,7 +115,9 @@ module el2_pmp
         2'b11: result =
              (pmp_req_type == EXEC) |
             ((pmp_req_type == READ) & ~priv_mode);
+        /* verilator coverage_off */
         default: ;
+        /* verilator coverage_on */
       endcase
     end else begin
       if (csr_pmp_cfg.read & csr_pmp_cfg.write & csr_pmp_cfg.execute & csr_pmp_cfg.lock) begin

diff --git a/testbench/tests/csr_mseccfg/csr_mseccfg.c b/testbench/tests/csr_mseccfg/csr_mseccfg.c
@@ -98,7 +98,8 @@ int main () {
     write_csr(CSR_PMPADDR3, PMPADDR(A(_data_end)));
 
     uint32_t pmpcfg;
-    pmpcfg = PMPREGION((PMPCFG_TOR | PMPCFG_X)           , 1) |
+    pmpcfg = PMPREGION((PMPCFG_TOR | PMPCFG_W | PMPCFG_X), 1) |
+             PMPREGION((PMPCFG_TOR | PMPCFG_W),            2) |
              PMPREGION((PMPCFG_TOR | PMPCFG_R | PMPCFG_W), 3);
 
     write_csr(CSR_PMPCFG0, pmpcfg);