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CI: limit exceptions tests to AXI and M mode
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Signed-off-by: Karol Gugala <[email protected]>
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kgugala committed Oct 9, 2024
1 parent e3931e1 commit 2fa1c29
Showing 1 changed file with 2 additions and 2 deletions.
4 changes: 2 additions & 2 deletions .github/workflows/test-regression-exceptions.yml
Original file line number Diff line number Diff line change
Expand Up @@ -10,13 +10,13 @@ jobs:
runs-on: ubuntu-latest
strategy:
matrix:
bus: ["axi", "ahb"]
bus: ["axi"]
test: ["machine_external_ints", "dbus_store_error", "lsu_trigger_hit", "machine_external_vec_ints", "dside_pic_access_error",
"iside_fetch_precise_bus_error", "dside_access_region_prediction_error", "cmark", "iside_core_local_unmapped_address_error",
"dside_access_across_region_boundary", "nmi_pin_assertion", "dside_size_misaligned_access_to_non_idempotent_address",
"dside_core_local_access_unmapped_address_error", "dbus_nonblocking_load_error", "internal_timer_ints", "ebreak_ecall", "illegal_instruction"]
coverage: ["all", "branch", "toggle"] #TODO: add functional coverage
priv: ["0", "1"]
priv: ["0"]
env:
DEBIAN_FRONTEND: "noninteractive"
CCACHE_DIR: "/opt/regression/.cache/"
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