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Modify FPGA creation for Versal and for 2.0 #320

Modify FPGA creation for Versal and for 2.0

Modify FPGA creation for Versal and for 2.0 #320

Triggered via pull request February 19, 2025 18:57
Status Success
Total duration 10m 14s
Artifacts 1

fpga-image.yml

on: pull_request
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caliptra-fpga-image
391 MB