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Properly evaluate PL0 PAUSERs when the fw header bit is unset #1536

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merged 1 commit into from
Jul 18, 2024

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@jhand2 jhand2 commented May 23, 2024

Previously, if PL0 PAUSER bit was unset, all users were treated as PL0. Align with the spec and treat them all as PL1 in that case.

bluegate010
bluegate010 previously approved these changes May 23, 2024
@jhand2 jhand2 force-pushed the fix_pl0_pauser branch 2 times, most recently from de9fa1b to 9513911 Compare May 24, 2024 01:01
@jhand2 jhand2 requested a review from jlmahowa-amd May 24, 2024 01:02
jlmahowa-amd
jlmahowa-amd previously approved these changes May 28, 2024
bluegate010
bluegate010 previously approved these changes May 28, 2024
@jhand2 jhand2 dismissed stale reviews from bluegate010 and jlmahowa-amd via 1acc2e8 May 31, 2024 20:23
@jlmahowa-amd jlmahowa-amd mentioned this pull request Jul 11, 2024
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@jhand2 jhand2 force-pushed the fix_pl0_pauser branch 2 times, most recently from 0b45aba to 34fdc27 Compare July 16, 2024 00:26
Previously, if PL0 PAUSER bit was unset, all users were treated as PL0.
Align with the spec and treat them all as PL1 in that case.
@jhand2 jhand2 enabled auto-merge (rebase) July 18, 2024 17:09
@jhand2 jhand2 merged commit ae6fe80 into chipsalliance:main Jul 18, 2024
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@nquarton nquarton added the Run-Time Run-time FW label Aug 2, 2024
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4 participants