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chipsalliance / caliptra-sw Public

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Modify FPGA creation for Versal and for 2.0#1950

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jlmahowa-amd wants to merge 2 commits intomain-2.xchipsalliance/caliptra-sw:main-2.xfrom jlmahowa/fpga-2.0-mergechipsalliance/caliptra-sw:jlmahowa/fpga-2.0-mergeCopy head branch name to clipboard

+2,311-1,169

Conversation Commits2 (2)Checks Files changed

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Commits on Feb 19, 2025

Updated hw/latest/rtl to fc2ec4574c8662d0d208c8cfd916ea5dcc312ef7
jlmahowa-amd
committed
FPGA Versal support for 2.0
jlmahowa-amd
committed

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