Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

feat: add CIRCTSRAMInterface #4494

Merged
merged 2 commits into from
Nov 20, 2024
Merged

Conversation

unlsycn
Copy link
Contributor

@unlsycn unlsycn commented Nov 4, 2024

This PR provides a wrapper to generate a CIRCT-compatible SRAM, so that we can use it to replace the SRAM in the CIRCT.

Contributor Checklist

  • Did you add Scaladoc to every public function/method?
  • Did you add at least one test demonstrating the PR?
  • Did you delete any extraneous printlns/debugging code?
  • Did you specify the type of improvement?
  • Did you add appropriate documentation in docs/src?
  • Did you request a desired merge strategy?
  • Did you add text to be included in the Release Notes for this change?

Type of Improvement

  • Feature (or new API)

Desired Merge Strategy

  • Squash: The PR will be squashed and merged (choose this if you have no preference).

Release Notes

Add CIRCTSRAMInterface

Reviewer Checklist (only modified by reviewer)

  • Did you add the appropriate labels? (Select the most appropriate one based on the "Type of Improvement")
  • Did you mark the proper milestone (Bug fix: 3.6.x, 5.x, or 6.x depending on impact, API modification or big change: 7.0)?
  • Did you review?
  • Did you check whether all relevant Contributor checkboxes have been checked?
  • Did you do one of the following when ready to merge:
    • Squash: You/ the contributor Enable auto-merge (squash), clean up the commit message, and label with Please Merge.
    • Merge: Ensure that contributor has cleaned up their commit history, then merge with Create a merge commit.

@sequencer
Copy link
Member

I like this API(since I originally designed it in our in-house codebase). Should it be CIRCTSRAMInterface or some other better name? I don't know. It follows the the old story when SFC was alive, MFC also follows it. This Module can be the chisel Public version to it, and write some memory behavior model in the future.

In the future, I wanna it can provide additional port MBIST feature.

@sequencer sequencer added the Feature New feature, will be included in release notes label Nov 4, 2024
Copy link
Member

@sequencer sequencer left a comment

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

LGTM

@sequencer sequencer added the Please Merge Accepted PRs that are ready to be merged. Useful when waiting on CI. label Nov 20, 2024
@chiselbot chiselbot merged commit 50a4e48 into chipsalliance:main Nov 20, 2024
18 checks passed
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Labels
Feature New feature, will be included in release notes Please Merge Accepted PRs that are ready to be merged. Useful when waiting on CI.
Projects
None yet
Development

Successfully merging this pull request may close these issues.

4 participants