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[rtl] fix old check in vrf.
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qinjun-li committed Nov 20, 2024
1 parent 1b59b4f commit ea948e5
Showing 1 changed file with 8 additions and 5 deletions.
13 changes: 8 additions & 5 deletions t1/src/vrf/VRF.scala
Original file line number Diff line number Diff line change
Expand Up @@ -504,19 +504,22 @@ class VRF(val parameter: VRFParam) extends Module with SerializableModule[VRFPar
val freeRecord: UInt = VecInit(chainingRecord.map(!_.valid)).asUInt
val recordFFO: UInt = ffo(freeRecord)
val recordEnq: UInt = Wire(UInt((parameter.chainingSize + 1).W))
val olderCheck = chainingRecord
.map(re => !re.valid || instIndexL(re.bits.instIndex, instructionWriteReport.bits.instIndex))
.reduce(_ && _)
val olderCheck = chainingRecord.map { re =>
// The same lsb will make it difficult to distinguish between the new and the old
val notSameLSB: Bool = re.bits.instIndex(parameter.instructionIndexBits - 2, 0) =/=
instructionWriteReport.bits.instIndex(parameter.instructionIndexBits - 2, 0)
!re.valid || (instIndexL(re.bits.instIndex, instructionWriteReport.bits.instIndex) && notSameLSB)
}.reduce(_ && _)
// handle VRF hazard
// @todo @Clo91eaf VRF ready signal for performance.
instructionWriteReport.ready := freeRecord.orR && olderCheck
recordEnq := Mux(
recordEnq := Mux(
// 纯粹的lsu指令的记录不需要ready
instructionWriteReport.valid,
recordFFO,
0.U((parameter.chainingSize + 1).W)
)
vrfAllocateIssue := freeRecord.orR && olderCheck
vrfAllocateIssue := freeRecord.orR && olderCheck

val writePort: Seq[ValidIO[VRFWriteRequest]] = Seq(writePipe)
val loadUnitReadPorts: Seq[DecoupledIO[VRFReadRequest]] = Seq(readRequests.last)
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