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chipyard.TestHarness.RocketSmall1Medium1Big1_BoomMedium1Large1Mega1.top.v.lo-2024-08-05.log
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===-------------------------------------------------------------------------=== | ||
... Execution time report ... | ||
===-------------------------------------------------------------------------=== | ||
Total Execution Time: 17.5497 seconds | ||
|
||
----User Time---- ----Wall Time---- ----Name---- | ||
2.7732 ( 7.1%) 2.7732 ( 15.8%) FIR Parser | ||
0.0000 ( 0.0%) 0.0000 ( 0.0%) Parse annotations | ||
0.0000 ( 0.0%) 0.0000 ( 0.0%) Parse OMIR | ||
2.3742 ( 6.1%) 2.3742 ( 13.5%) Parse modules | ||
0.3542 ( 0.9%) 0.3542 ( 2.0%) Verify circuit | ||
16.4387 ( 42.3%) 7.3045 ( 41.6%) 'firrtl.circuit' Pipeline | ||
0.3506 ( 0.9%) 0.3506 ( 2.0%) LowerFIRRTLAnnotations | ||
0.0947 ( 0.2%) 0.0947 ( 0.5%) LowerIntrinsics | ||
0.0946 ( 0.2%) 0.0946 ( 0.5%) (A) circt::firrtl::InstanceGraph | ||
3.5441 ( 9.1%) 0.9254 ( 5.3%) 'firrtl.module' Pipeline | ||
1.6391 ( 4.2%) 0.4605 ( 2.6%) DropName | ||
1.8994 ( 4.9%) 0.4895 ( 2.8%) CSE | ||
0.0009 ( 0.0%) 0.0003 ( 0.0%) (A) DominanceInfo | ||
0.0000 ( 0.0%) 0.0000 ( 0.0%) InjectDUTHierarchy | ||
0.1141 ( 0.3%) 0.0291 ( 0.2%) 'firrtl.module' Pipeline | ||
0.1116 ( 0.3%) 0.0285 ( 0.2%) LowerCHIRRTLPass | ||
0.1051 ( 0.3%) 0.1051 ( 0.6%) InferWidths | ||
0.2113 ( 0.5%) 0.2113 ( 1.2%) MemToRegOfVec | ||
0.4083 ( 1.1%) 0.4083 ( 2.3%) InferResets | ||
0.0568 ( 0.1%) 0.0568 ( 0.3%) (A) circt::firrtl::InstanceGraph | ||
0.0732 ( 0.2%) 0.0732 ( 0.4%) WireDFT | ||
0.5431 ( 1.4%) 0.1403 ( 0.8%) 'firrtl.module' Pipeline | ||
0.5408 ( 1.4%) 0.1398 ( 0.8%) FlattenMemory | ||
0.2735 ( 0.7%) 0.2735 ( 1.6%) LowerFIRRTLTypes | ||
0.7114 ( 1.8%) 0.1837 ( 1.0%) 'firrtl.module' Pipeline | ||
0.6881 ( 1.8%) 0.1770 ( 1.0%) ExpandWhens | ||
0.0200 ( 0.1%) 0.0064 ( 0.0%) SFCCompat | ||
0.3375 ( 0.9%) 0.3375 ( 1.9%) Inliner | ||
0.5530 ( 1.4%) 0.1420 ( 0.8%) 'firrtl.module' Pipeline | ||
0.5510 ( 1.4%) 0.1415 ( 0.8%) RandomizeRegisterInit | ||
0.9834 ( 2.5%) 0.9834 ( 5.6%) CheckCombLoops | ||
0.0528 ( 0.1%) 0.0528 ( 0.3%) (A) circt::firrtl::InstanceGraph | ||
3.3322 ( 8.6%) 0.8550 ( 4.9%) 'firrtl.module' Pipeline | ||
3.0341 ( 7.8%) 0.7884 ( 4.5%) Canonicalizer | ||
0.2947 ( 0.8%) 0.0787 ( 0.4%) InferReadWrite | ||
0.1556 ( 0.4%) 0.1556 ( 0.9%) PrefixModules | ||
0.0618 ( 0.2%) 0.0618 ( 0.4%) (A) circt::firrtl::InstanceGraph | ||
0.0002 ( 0.0%) 0.0002 ( 0.0%) (A) circt::firrtl::NLATable | ||
0.6859 ( 1.8%) 0.6859 ( 3.9%) IMConstProp | ||
0.0628 ( 0.2%) 0.0628 ( 0.4%) AddSeqMemPorts | ||
0.0626 ( 0.2%) 0.0626 ( 0.4%) (A) circt::firrtl::InstanceGraph | ||
0.1702 ( 0.4%) 0.1702 ( 1.0%) CreateSiFiveMetadata | ||
0.0467 ( 0.1%) 0.0467 ( 0.3%) ExtractInstances | ||
0.0003 ( 0.0%) 0.0003 ( 0.0%) (A) circt::firrtl::NLATable | ||
0.0001 ( 0.0%) 0.0001 ( 0.0%) GrandCentral | ||
0.0004 ( 0.0%) 0.0004 ( 0.0%) BlackBoxReader | ||
0.3364 ( 0.9%) 0.0864 ( 0.5%) 'firrtl.module' Pipeline | ||
0.3340 ( 0.9%) 0.0859 ( 0.5%) DropName | ||
0.3409 ( 0.9%) 0.3409 ( 1.9%) SymbolDCE | ||
0.2541 ( 0.7%) 0.2541 ( 1.4%) InnerSymbolDCE | ||
2.0791 ( 5.3%) 1.1793 ( 6.7%) 'firrtl.circuit' Pipeline | ||
0.8999 ( 2.3%) 0.2307 ( 1.3%) 'firrtl.module' Pipeline | ||
0.8978 ( 2.3%) 0.2302 ( 1.3%) Canonicalizer | ||
0.5592 ( 1.4%) 0.5592 ( 3.2%) IMDeadCodeElim | ||
0.0614 ( 0.2%) 0.0614 ( 0.3%) (A) circt::firrtl::InstanceGraph | ||
0.0000 ( 0.0%) 0.0000 ( 0.0%) EmitOMIR | ||
0.0273 ( 0.1%) 0.0273 ( 0.2%) ResolveTraces | ||
0.0001 ( 0.0%) 0.0001 ( 0.0%) (A) circt::firrtl::NLATable | ||
0.2675 ( 0.7%) 0.2675 ( 1.5%) LowerXMR | ||
0.0563 ( 0.1%) 0.0563 ( 0.3%) (A) circt::firrtl::InstanceGraph | ||
0.7387 ( 1.9%) 0.7387 ( 4.2%) LowerFIRRTLToHW | ||
0.0636 ( 0.2%) 0.0636 ( 0.4%) (A) circt::firrtl::InstanceGraph | ||
0.0003 ( 0.0%) 0.0003 ( 0.0%) (A) circt::firrtl::NLATable | ||
5.3807 ( 13.8%) 1.5350 ( 8.7%) 'hw.module' Pipeline | ||
0.9859 ( 2.5%) 0.2565 ( 1.5%) CSE | ||
0.0009 ( 0.0%) 0.0004 ( 0.0%) (A) DominanceInfo | ||
3.0952 ( 8.0%) 1.0019 ( 5.7%) Canonicalizer | ||
0.6583 ( 1.7%) 0.1888 ( 1.1%) CSE | ||
0.0007 ( 0.0%) 0.0002 ( 0.0%) (A) DominanceInfo | ||
0.6351 ( 1.6%) 0.2019 ( 1.2%) LowerSeqFIRRTLToSV | ||
0.1961 ( 0.5%) 0.1961 ( 1.1%) HWMemSimImpl | ||
3.6694 ( 9.4%) 1.0829 ( 6.2%) 'hw.module' Pipeline | ||
0.9889 ( 2.5%) 0.2814 ( 1.6%) CSE | ||
0.0013 ( 0.0%) 0.0005 ( 0.0%) (A) DominanceInfo | ||
1.8384 ( 4.7%) 0.6828 ( 3.9%) Canonicalizer | ||
0.5501 ( 1.4%) 0.1737 ( 1.0%) CSE | ||
0.0011 ( 0.0%) 0.0004 ( 0.0%) (A) DominanceInfo | ||
0.2843 ( 0.7%) 0.0827 ( 0.5%) HWCleanup | ||
0.6352 ( 1.6%) 0.1599 ( 0.9%) 'hw.module' Pipeline | ||
0.0654 ( 0.2%) 0.0175 ( 0.1%) HWLegalizeModules | ||
0.5616 ( 1.4%) 0.1423 ( 0.8%) PrettifyVerilog | ||
0.2337 ( 0.6%) 0.2337 ( 1.3%) StripDebugInfoWithPred | ||
1.7795 ( 4.6%) 1.7795 ( 10.1%) ExportVerilog | ||
2.1882 ( 5.6%) 0.5775 ( 3.3%) 'builtin.module' Pipeline | ||
1.6107 ( 4.1%) 0.4086 ( 2.3%) 'hw.module' Pipeline | ||
1.6083 ( 4.1%) 0.4081 ( 2.3%) PrepareForEmission | ||
-0.5724 ( -1.5%) -0.5724 ( -3.3%) Rest | ||
38.8799 (100.0%) 17.5497 (100.0%) Total | ||
|
||
{ | ||
totalTime: 17.595, | ||
maxMemory: 876728320 | ||
} |
49 changes: 49 additions & 0 deletions
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...TestHarness.RocketSmall1Medium1Big1_BoomMedium1Large1Mega1.top.v.lo-vlint-2024-08-05.json
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{ | ||
"errors": { | ||
"'table_1_ext'": 1, | ||
"This may be because there's no search path specified with -I<dir>.": 1, | ||
"'table_0_ext'": 1, | ||
"'hi_us_0_ext'": 1, | ||
"'table_ext'": 1, | ||
"'hi_us_ext'": 1, | ||
"'meta_0_0_ext'": 1, | ||
"'data_ext'": 1, | ||
"'ebtb_ext'": 1, | ||
"'btb_0_ext'": 1, | ||
"'meta_0_ext'": 1, | ||
"'rob_debug_inst_mem_1_ext'": 1, | ||
"'meta_2_ext'": 1, | ||
"'tag_array_5_ext'": 1, | ||
"'rob_debug_inst_mem_0_ext'": 1, | ||
"'ghist_0_0_ext'": 1, | ||
"'meta_1_ext'": 1, | ||
"'rob_debug_inst_mem_ext'": 1, | ||
"'ghist_0_ext'": 1, | ||
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"'dataArrayB0Way_0_ext'": 1, | ||
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"'data_arrays_0_1_ext'": 1, | ||
"'data_arrays_0_0_ext'": 1, | ||
"'tag_array_0_ext'": 1, | ||
"'tag_array_ext'": 1, | ||
"'data_arrays_0_ext'": 1, | ||
"'plusarg_reader'": 142, | ||
"'l2_tlb_ram_1_ext'": 1, | ||
"'l2_tlb_ram_0_ext'": 1, | ||
"'tag_array_1_ext'": 1, | ||
"'l2_tlb_ram_ext'": 1, | ||
"'cc_banks_0_ext'": 1, | ||
"'cc_dir_ext'": 1, | ||
"'ClockDividerN'": 1, | ||
"'EICG_wrapper'": 1, | ||
"'GenericDigitalOutIOCell'": 9, | ||
"'GenericDigitalInIOCell'": 13 | ||
}, | ||
"warnings": { | ||
"WIDTH": 113 | ||
} | ||
} |
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regress/test1.fir:7247:15: error: use of unknown declaration 'validif' | ||
tmp499 <= validif(head(inp_a.inp_c.inp_j.inp_gc.inp_gkb.inp_flb.inp_fic, 1), SInt<13>("h-b9c")) | ||
^ | ||
regress/test1.fir:28262:15: error: use of unknown declaration 'validif' | ||
tmp550 <= validif(tail(asUInt(SInt<22>("h-3089")), 21), tmp548) | ||
^ | ||
regress/test1.fir:51636:15: error: use of unknown declaration 'validif' | ||
tmp541 <= validif(tail(inp_jc.inp_hd.inp_ae.inp_ei.inp_ahb.inp_mlc, 26), inp_a.inp_b.inp_d.inp_f.inp_g.inp_bb.inp_eb.inp_kd.inp_nk.inp_an.inp_gp.inp_mic) | ||
^ | ||
===-------------------------------------------------------------------------=== | ||
... Execution time report ... | ||
===-------------------------------------------------------------------------=== | ||
Total Execution Time: 0.0709 seconds | ||
|
||
----Wall Time---- ----Name---- | ||
0.0701 ( 98.8%) FIR Parser | ||
0.0000 ( 0.0%) Parse annotations | ||
0.0000 ( 0.0%) Parse OMIR | ||
0.0656 ( 92.5%) Parse modules | ||
0.0008 ( 1.2%) Rest | ||
0.0709 (100.0%) Total | ||
|
||
{ | ||
totalTime: 0.079, | ||
maxMemory: 0 | ||
} |
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{ | ||
"errors": {}, | ||
"warnings": {} | ||
} |
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@@ -0,0 +1,20 @@ | ||
regress/test2.fir:247424:17: error: use of unknown declaration 'validif' | ||
tmp20070 <= validif(head(UInt<3>(6), 1), SInt<24>("b-11111101000010001010101")) | ||
^ | ||
===-------------------------------------------------------------------------=== | ||
... Execution time report ... | ||
===-------------------------------------------------------------------------=== | ||
Total Execution Time: 0.9472 seconds | ||
|
||
----Wall Time---- ----Name---- | ||
0.9455 ( 99.8%) FIR Parser | ||
0.0000 ( 0.0%) Parse annotations | ||
0.0000 ( 0.0%) Parse OMIR | ||
0.8986 ( 94.9%) Parse modules | ||
0.0017 ( 0.2%) Rest | ||
0.9472 (100.0%) Total | ||
|
||
{ | ||
totalTime: 0.96, | ||
maxMemory: 162242560 | ||
} |
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{ | ||
"errors": {}, | ||
"warnings": {} | ||
} |
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@@ -0,0 +1,29 @@ | ||
regress/test3.fir:20273:15: error: use of unknown declaration 'validif' | ||
tmp236 <= validif(head(inp_h.inp_i.inp_k.inp_p.inp_gb.inp_pb.inp_nd[0][3][3].inp_ng.inp_li, 1), UInt<6>(33)) | ||
^ | ||
regress/test3.fir:170544:16: error: use of unknown declaration 'validif' | ||
tmp2807 <= validif(tail(UInt<29>("b111111100001000110000101110"), 28), SInt<4>("o-1")) | ||
^ | ||
regress/test3.fir:324162:15: error: use of unknown declaration 'validif' | ||
tmp523 <= validif(head(inp_e.inp_ob.inp_ge.inp_ki[1][2][3].inp_hk.inp_il, 1), inp_a.inp_c.inp_hc.inp_fd.inp_je.inp_dl) | ||
^ | ||
regress/test3.fir:847311:15: error: use of unknown declaration 'validif' | ||
tmp237 <= validif(tail(asUInt(inp_e.inp_i.inp_j.inp_bb[4][4].inp_oh), 18), tmp227) | ||
^ | ||
===-------------------------------------------------------------------------=== | ||
... Execution time report ... | ||
===-------------------------------------------------------------------------=== | ||
Total Execution Time: 0.4280 seconds | ||
|
||
----Wall Time---- ----Name---- | ||
0.4255 ( 99.4%) FIR Parser | ||
0.0000 ( 0.0%) Parse annotations | ||
0.0000 ( 0.0%) Parse OMIR | ||
0.3894 ( 91.0%) Parse modules | ||
0.0026 ( 0.6%) Rest | ||
0.4280 (100.0%) Total | ||
|
||
{ | ||
totalTime: 0.439, | ||
maxMemory: 130027520 | ||
} |
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{ | ||
"errors": {}, | ||
"warnings": {} | ||
} |