Skip to content

Commit

Permalink
Plumbing to make Xmit and ConfReg Maybes
Browse files Browse the repository at this point in the history
  • Loading branch information
jvnknvlgl committed Jul 1, 2024
1 parent 9ae3631 commit 9cd52f2
Show file tree
Hide file tree
Showing 9 changed files with 363 additions and 358 deletions.
10 changes: 5 additions & 5 deletions clash-cores/src/Clash/Cores/Sgmii.hs
Original file line number Diff line number Diff line change
Expand Up @@ -18,9 +18,9 @@ sgmiiCdc ::
Clock dom1 ->
Reset dom0 ->
Reset dom1 ->
Signal dom0 Xmit ->
Signal dom0 ConfReg ->
Signal dom1 (Xmit, ConfReg)
Signal dom0 (Maybe Xmit) ->
Signal dom0 (Maybe ConfReg) ->
Signal dom1 (Maybe Xmit, Maybe ConfReg)
) ->
Clock dom0 ->
Clock dom1 ->
Expand Down Expand Up @@ -49,10 +49,10 @@ sgmiiCdc autoNegCdc clk0 clk1 rst0 rst1 txEn txEr dw1 cg1 =

(xmit1, txConfReg1) =
unbundle
$ autoNeg' clk0 rst0 enableGen mrAdvAbility syncStatus rudi rxConfReg
$ autoNeg' clk0 rst0 enableGen confReg syncStatus rudi rxConfReg
where
autoNeg' = exposeClockResetEnable autoNeg
mrAdvAbility = 0b0100000000000001
confReg = 0b0100000000000001

dw4 = (fmap . fmap) fromDw dw3

Expand Down
22 changes: 10 additions & 12 deletions clash-cores/src/Clash/Cores/Sgmii/AutoNeg.hs
Original file line number Diff line number Diff line change
Expand Up @@ -30,7 +30,7 @@ data AutoNegState dom
| AbilityDetect
{ _rudis :: Vec 3 Rudi
, _rxConfRegs :: Vec 3 ConfReg
, _mrAdvAbility :: ConfReg
, _confReg :: ConfReg
, _failTimer :: Timeout dom
}
| AcknowledgeDetect
Expand Down Expand Up @@ -132,37 +132,35 @@ autoNegT AnEnable{..} (_, syncStatus, rudi, rxConfReg) = nextState
rudis = maybe _rudis (_rudis <<+) rudi
rxConfRegs = maybe _rxConfRegs (_rxConfRegs <<+) rxConfReg
failTimer = if syncStatus == Fail then _failTimer + 1 else 0
autoNegT AnRestart{..} (mrAdvAbility, syncStatus, rudi, rxConfReg) = nextState
autoNegT AnRestart{..} (confReg, syncStatus, rudi, rxConfReg) = nextState
where
nextState
| failTimer >= timeout (Proxy @dom) =
AnEnable rudis rxConfRegs (timeout (Proxy @dom) - 1)
| rudi == Just Invalid = AnEnable rudis rxConfRegs failTimer
| linkTimer >= timeout (Proxy @dom) =
AbilityDetect rudis rxConfRegs mrAdvAbility failTimer
AbilityDetect rudis rxConfRegs confReg failTimer
| otherwise = AnRestart rudis rxConfRegs failTimer linkTimer

rudis = maybe _rudis (_rudis <<+) rudi
rxConfRegs = maybe _rxConfRegs (_rxConfRegs <<+) rxConfReg
linkTimer = _linkTimer + 1
failTimer = if syncStatus == Fail then _failTimer + 1 else 0
autoNegT AbilityDetect{..} (mrAdvAbility, syncStatus, rudi, rxConfReg) =
nextState
autoNegT AbilityDetect{..} (confReg, syncStatus, rudi, rxConfReg) = nextState
where
nextState
| failTimer >= timeout (Proxy @dom) =
AnEnable rudis rxConfRegs (timeout (Proxy @dom) - 1)
| rudi == Just Invalid = AnEnable rudis rxConfRegs failTimer
| abilityMatch rudis rxConfRegs && last rxConfRegs /= 0 =
AcknowledgeDetect rudis rxConfRegs txConfReg failTimer
| otherwise = AbilityDetect rudis rxConfRegs mrAdvAbility failTimer
| otherwise = AbilityDetect rudis rxConfRegs confReg failTimer

rudis = maybe _rudis (_rudis <<+) rudi
rxConfRegs = maybe _rxConfRegs (_rxConfRegs <<+) rxConfReg
txConfReg = replaceBit (14 :: Index 16) 0 mrAdvAbility
txConfReg = replaceBit (14 :: Index 16) 0 confReg
failTimer = if syncStatus == Fail then _failTimer + 1 else 0
autoNegT AcknowledgeDetect{..} (_, syncStatus, rudi, rxConfReg) =
nextState
autoNegT AcknowledgeDetect{..} (_, syncStatus, rudi, rxConfReg) = nextState
where
nextState
| failTimer >= timeout (Proxy @dom) =
Expand Down Expand Up @@ -240,7 +238,7 @@ autoNegO self@AnEnable{} = (self, Just Conf, Just 0)
autoNegO self@AnRestart{} = (self, Nothing, Just 0)
autoNegO self@AbilityDetect{..} = (self, Nothing, Just txConfReg)
where
txConfReg = replaceBit (14 :: Index 16) 0 _mrAdvAbility
txConfReg = replaceBit (14 :: Index 16) 0 _confReg
autoNegO self@AcknowledgeDetect{..} = (self, Nothing, Just txConfReg)
where
txConfReg = replaceBit (14 :: Index 16) 1 _txConfReg
Expand All @@ -262,9 +260,9 @@ autoNeg ::
-- | A new value of 'ConfReg' from 'Sgmii.pcsReceive'
Signal dom (Maybe ConfReg) ->
-- | Tuple containing the new value for 'Xmit' and a new 'ConfReg'
Signal dom (Xmit, ConfReg)
Signal dom (Maybe Xmit, Maybe ConfReg)
autoNeg confReg syncStatus rudi rxConfReg =
bundle (regMaybe Conf xmit, regMaybe 0 txConfReg)
bundle (xmit, txConfReg)
where
(_, xmit, txConfReg) =
mooreB
Expand Down
2 changes: 1 addition & 1 deletion clash-cores/src/Clash/Cores/Sgmii/BitSlip.hs
Original file line number Diff line number Diff line change
Expand Up @@ -47,7 +47,7 @@ bitSlipT BSOk{..} cg = nextState

s = resize $ _s ++# cg

-- | Output state for 'bitSlip' that takes the calculated index value and
-- | Output function for 'bitSlip' that takes the calculated index value and
-- rotates the state vector to create the new output value
bitSlipO ::
-- | Current state
Expand Down
Loading

0 comments on commit 9cd52f2

Please sign in to comment.