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Move outputQueue to a Moore machine
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jvnknvlgl committed Jun 21, 2024
1 parent ecdedef commit ac38bab
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Showing 2 changed files with 32 additions and 45 deletions.
75 changes: 31 additions & 44 deletions clash-cores/src/Clash/Cores/Sgmii/Sync.hs
Original file line number Diff line number Diff line change
Expand Up @@ -19,36 +19,21 @@ data SyncState
, _dw :: DataWord
, _rxEven :: Even
}
| CommaDetect1
{ _cg :: BitVector 10
, _rd :: Bool
, _dw :: DataWord
, _rxEven :: Even
}
| CommaDetect1 {_cg :: BitVector 10, _rd :: Bool, _dw :: DataWord}
| AcquireSync1
{ _cg :: BitVector 10
, _rd :: Bool
, _dw :: DataWord
, _rxEven :: Even
}
| CommaDetect2
{ _cg :: BitVector 10
, _rd :: Bool
, _dw :: DataWord
, _rxEven :: Even
}
| CommaDetect2 {_cg :: BitVector 10, _rd :: Bool, _dw :: DataWord}
| AcquireSync2
{ _cg :: BitVector 10
, _rd :: Bool
, _dw :: DataWord
, _rxEven :: Even
}
| CommaDetect3
{ _cg :: BitVector 10
, _rd :: Bool
, _dw :: DataWord
, _rxEven :: Even
}
| CommaDetect3 {_cg :: BitVector 10, _rd :: Bool, _dw :: DataWord}
| SyncAcquired1
{ _cg :: BitVector 10
, _rd :: Bool
Expand Down Expand Up @@ -123,7 +108,7 @@ syncT self@LossOfSync{..} cg = (nextState, out)
where
nextState
| cg `notElem` commas = LossOfSync cg rd dw rxEven
| cg `elem` commas = CommaDetect1 cg rd dw rxEven
| cg `elem` commas = CommaDetect1 cg rd dw
| otherwise = LossOfSync cg rd dw rxEven

(rd, dw) = ebTbDecode _rd cg
Expand All @@ -136,7 +121,7 @@ syncT self@CommaDetect1{..} cg = (nextState, out)
nextState
| not (isDw dw) = LossOfSync cg rd dw rxEven
| isDw dw = AcquireSync1 cg rd dw rxEven
| otherwise = CommaDetect1 cg rd dw rxEven
| otherwise = CommaDetect1 cg rd dw

(rd, dw) = ebTbDecode _rd cg
rxEven = Even
Expand All @@ -148,7 +133,7 @@ syncT self@AcquireSync1{..} cg = (nextState, out)
nextState
| not (isValidDw dw) = LossOfSync cg rd dw rxEven
| cg `elem` commas && rxEven == Even = LossOfSync cg rd dw rxEven
| cg `elem` commas && rxEven == Odd = CommaDetect2 cg rd dw rxEven
| cg `elem` commas && rxEven == Odd = CommaDetect2 cg rd dw
| cg `notElem` commas && isValidDw dw = AcquireSync1 cg rd dw rxEven
| otherwise = AcquireSync1 cg rd dw rxEven

Expand All @@ -162,7 +147,7 @@ syncT self@CommaDetect2{..} cg = (nextState, out)
nextState
| not (isDw dw) = LossOfSync cg rd dw rxEven
| isDw dw = AcquireSync2 cg rd dw rxEven
| otherwise = CommaDetect2 cg rd dw rxEven
| otherwise = CommaDetect2 cg rd dw

(rd, dw) = ebTbDecode _rd cg
rxEven = Even
Expand All @@ -174,7 +159,7 @@ syncT self@AcquireSync2{..} cg = (nextState, out)
nextState
| not (isValidDw dw) = LossOfSync cg rd dw rxEven
| cg `elem` commas && rxEven == Even = LossOfSync cg rd dw rxEven
| cg `elem` commas && rxEven == Odd = CommaDetect3 cg rd dw rxEven
| cg `elem` commas && rxEven == Odd = CommaDetect3 cg rd dw
| cg `notElem` commas && isValidDw dw = AcquireSync2 cg rd dw rxEven
| otherwise = AcquireSync2 cg rd dw rxEven

Expand All @@ -188,7 +173,7 @@ syncT self@CommaDetect3{..} cg = (nextState, out)
nextState
| not (isDw dw) = LossOfSync cg rd dw rxEven
| isDw dw = SyncAcquired1 cg rd dw rxEven
| otherwise = CommaDetect3 cg rd dw rxEven
| otherwise = CommaDetect3 cg rd dw

(rd, dw) = ebTbDecode _rd cg
rxEven = Even
Expand Down Expand Up @@ -316,25 +301,27 @@ syncT self@SyncAcquired4A{..} cg = (nextState, out)
-- keep a small list of "future" values for 'DataWord', such that these can
-- be used in 'Sgmii.checkEnd'.
outputQueueT ::
-- | Shift registers with 3 values for the running disparity, 'Even',
-- 'SyncStatus' and 'Xmit' and 'DataWord'
-- | Current state with three values for all inputs
OutputQueue ->
-- | New input values for the running disparity, 'DataWord', 'Even',
-- 'SyncStatus'
-- | New input values for the code group, running disparity, data word, 'Even'
-- signal and 'SyncStatus;
(BitVector 10, Bool, DataWord, Even, SyncStatus) ->
-- | Next state and the new output values, which is one value for everything
-- except for 'DataWord' as we want to be able to look into the future
( OutputQueue
, (BitVector 10, Bool, Vec 3 DataWord, Even, SyncStatus)
)
outputQueueT s i = (nextState, out)
-- | New state
OutputQueue
outputQueueT s i = s <<+ i

-- | Output function for the output queue, where the values are taken from the
-- current state
outputQueueO ::
-- Current state with three values for all inputs
OutputQueue ->
-- | New output with one value for everything except 'DataWord' for the
-- prescient 'Sgmii.checkEnd' function.
(BitVector 10, Bool, Vec 3 DataWord, Even, SyncStatus)
outputQueueO s = (cg, rd, dw, rxEven, syncStatus)
where
nextState = s <<+ i

(head -> cg, head -> rd, dw, head -> rxEven, head -> syncStatus) = unzip5 s

out = (cg, rd, dw, rxEven, syncStatus)

-- | Takes a code group and runs it through the state machine as defined in
-- IEEE 802.3 Clause 36 to check whether the signal is synchronized. If it is
-- not, output 'SyncStatus' @Fail@ and try to re-aquire synchronization, else
Expand All @@ -348,11 +335,11 @@ sync ::
-- | A tuple containing the running disparity, a new 'DataWord', the new value
-- for 'Even' and the current synchronization status
Signal dom (BitVector 10, Bool, Vec 3 DataWord, Even, SyncStatus)
sync i = o
sync cg1 = out
where
o =
mealy outputQueueT (repeat (0, False, Dw 0, Odd, Fail))
$ bundle (cg, rd, dw, rxEven, syncStatus)
out =
moore outputQueueT outputQueueO (repeat (0, False, Dw 0, Odd, Fail))
$ bundle (cg2, rd, dw, rxEven, syncStatus)

(_, cg, rd, dw, rxEven, syncStatus) =
mealyB syncT (LossOfSync 0 False (Dw 0) Even) i
(_, cg2, rd, dw, rxEven, syncStatus) =
mealyB syncT (LossOfSync 0 False (Dw 0) Even) cg1
2 changes: 1 addition & 1 deletion clash-cores/test/Test/Cores/Sgmii/Sgmii.hs
Original file line number Diff line number Diff line change
Expand Up @@ -52,7 +52,7 @@ syncSim ::
syncSim s i = o
where
o =
C.mealy outputQueueT (C.repeat (0, False, Dw 0, Odd, Ok)) $
C.moore outputQueueT outputQueueO (C.repeat (0, False, Dw 0, Odd, Ok)) $
C.bundle (cg, rd, dw, rxEven, syncStatus)

(_, cg, rd, dw, rxEven, syncStatus) =
Expand Down

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