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Cleanup and marking with TODO AArch64 (#20933)
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@WalterBright
WalterBright authored Mar 2, 2025
1 parent 978b108 commit 6ee6720
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Showing 4 changed files with 33 additions and 87 deletions.
37 changes: 9 additions & 28 deletions compiler/src/dmd/backend/arm/cod1.d
View file
Original file line number Diff line number Diff line change
Expand Up @@ -293,7 +293,6 @@ void logexp(ref CodeBuilder cdb, elem* e, uint jcond, FL fltarg, code* targ)
return;
}

int no87 = 1;
docommas(cdb, e); // scan down commas
cgstate.stackclean++;

Expand Down Expand Up @@ -413,8 +412,7 @@ void logexp(ref CodeBuilder cdb, elem* e, uint jcond, FL fltarg, code* targ)
if (!(jcond & 1))
cond ^= 1; // toggle jump condition(s)
codelem(cgstate,cdb, e, retregs, true); // evaluate elem
if (no87)
cse_flush(cdb,no87); // flush CSE's to memory
cse_flush(cdb,1); // flush CSE's to memory
genBranch(cdb, cond, fltarg, cast(block*) targ); // generate jmp instruction
cgstate.stackclean--;
}
Expand Down Expand Up @@ -1246,7 +1244,7 @@ void fixresult(ref CodeBuilder cdb, elem* e, regm_t retregs, ref regm_t outretre
{
bool opsflag = false;
rreg = allocreg(cdb, outretregs, tym); // allocate return regs
if (0 && retregs & XMMREGS)
if (0 && retregs & XMMREGS) // TODO AArch64
{
reg = findreg(retregs & XMMREGS);
if (mask(rreg) & XMMREGS)
Expand All @@ -1269,7 +1267,7 @@ void fixresult(ref CodeBuilder cdb, elem* e, regm_t retregs, ref regm_t outretre
}
}
}
/+
/+ TODO AArch64
else if (forregs & XMMREGS)
{
reg = findreg(retregs & (mBP | ALLREGS));
Expand Down Expand Up @@ -1330,7 +1328,6 @@ void fixresult(ref CodeBuilder cdb, elem* e, regm_t retregs, ref regm_t outretre
}
}

// cdfunc
/*******************************
* Generate code sequence for function call.
*/
Expand All @@ -1342,7 +1339,7 @@ void cdfunc(ref CGstate cg, ref CodeBuilder cdb, elem* e, ref regm_t pretregs)
assert(e);
uint numpara = 0; // bytes of parameters
uint stackpushsave = cgstate.stackpush; // so we can compute # of parameters
printf("stackpushsave: %d\n", stackpushsave);
//printf("stackpushsave: %d\n", stackpushsave);
cgstate.stackclean++;
regm_t keepmsk = 0;
int xmmcnt = 0;
Expand Down Expand Up @@ -1500,6 +1497,7 @@ printf("numalign: %d numpara: %d\n", numalign, numpara);
targ_size_t funcargtos = numpara;
//printf("funcargtos1 = %d\n", cast(int)funcargtos);

// TODO AArch64
/* Parameters go into the registers RDI,RSI,RDX,RCX,R8,R9
* float and double parameters go into XMM0..XMM7
* For variadic functions, count of XMM registers used goes in AL
Expand Down Expand Up @@ -1641,26 +1639,7 @@ printf("numalign: %d numpara: %d\n", numalign, numpara);

if (tybasic(ep.Ety) == TYcfloat)
{
assert(I64);
assert(lreg == ST01 && mreg == NOREG);
// spill
pop87();
pop87();
cdb.genfltreg(0xD9, 3, tysize(TYfloat));
genfwait(cdb);
cdb.genfltreg(0xD9, 3, 0);
genfwait(cdb);
// reload
if (config.exe == EX_WIN64)
{
cdb.genfltreg(LOD, preg, 0);
code_orrex(cdb.last(), REX_W);
}
else
{
assert(mask(preg) & XMMREGS);
cdb.genxmmreg(xmmload(TYdouble), cast(reg_t) preg, 0, TYdouble);
}
assert(0);
}
else foreach (v; 0 .. 2)
{
Expand Down Expand Up @@ -1771,6 +1750,8 @@ private void funccall(ref CodeBuilder cdb, elem* e, uint numpara, uint numalign,
cgstate.calledafunc = 1;
// Determine if we need frame for function prolog/epilog

// TODO AArch64

if (config.memmodel == Vmodel)
{
if (tyfarfunc(funcsym_p.ty()))
Expand Down Expand Up @@ -2215,7 +2196,7 @@ void loaddata(ref CodeBuilder cdb, elem* e, ref regm_t outretregs)
forregs = outretregs & (cgstate.allregs | INSTR.FLOATREGS); // XMMREGS ?
if (e.Eoper == OPconst)
{
if (0 && tyvector(tym) && forregs & XMMREGS) // TODO
if (0 && tyvector(tym) && forregs & XMMREGS) // TODO AArch64
{
assert(!flags);
const xreg = allocreg(cdb, forregs, tym); // allocate registers
Expand Down
24 changes: 9 additions & 15 deletions compiler/src/dmd/backend/arm/cod2.d
View file
Original file line number Diff line number Diff line change
Expand Up @@ -84,14 +84,7 @@ void cdorth(ref CGstate cg, ref CodeBuilder cdb,elem* e,ref regm_t pretregs)

regm_t retregs2 = posregs & ~retregs1;
//printf("retregs1: %s retregs2: %s\n", regm_str(retregs1), regm_str(retregs2));
static if (0)
{
scodelem(cg, cdb, e2, retregs2, retregs1, false);
}
else
{
retregs2 = mask(33);
}
reg_t Rm = findreg(retregs2);

regm_t retregs = pretregs & posregs;
Expand Down Expand Up @@ -445,7 +438,7 @@ void cdnot(ref CGstate cg, ref CodeBuilder cdb,elem* e,ref regm_t pretregs)
@trusted
void cdcom(ref CGstate cg, ref CodeBuilder cdb,elem* e,ref regm_t pretregs)
{
printf("cdcom()\n");
//printf("cdcom()\n");
//elem_print(e);
if (pretregs == 0)
{
Expand Down Expand Up @@ -552,7 +545,7 @@ void cdcond(ref CGstate cg, ref CodeBuilder cdb,elem* e,ref regm_t pretregs)
docommas(cdb,e1);
cgstate.stackclean++;

if (0 && !OTrel(op1) && e1 == e21 &&
if (0 && !OTrel(op1) && e1 == e21 && // TODO AArch64
sz1 <= REGSIZE && !tyfloating(e1.Ety))
{ // Recognize (e ? e : f)

Expand Down Expand Up @@ -583,7 +576,7 @@ void cdcond(ref CGstate cg, ref CodeBuilder cdb,elem* e,ref regm_t pretregs)
}

uint sz2;
if (0 && OTrel(op1) && sz1 <= REGSIZE && tysize(e2.Ety) <= REGSIZE &&
if (0 && OTrel(op1) && sz1 <= REGSIZE && tysize(e2.Ety) <= REGSIZE && // TODO AArch64
!e1.Ecount &&
(jop == COND.cs || jop == COND.cc) &&
(sz2 = tysize(e2.Ety)) <= REGSIZE &&
Expand Down Expand Up @@ -685,7 +678,7 @@ void cdcond(ref CGstate cg, ref CodeBuilder cdb,elem* e,ref regm_t pretregs)
}
}

if (0 && op1 != OPcond && op1 != OPandand && op1 != OPoror &&
if (0 && op1 != OPcond && op1 != OPandand && op1 != OPoror && // TODO AArch64
op1 != OPnot && op1 != OPbool &&
e21.Eoper == OPconst &&
sz1 <= REGSIZE &&
Expand Down Expand Up @@ -926,6 +919,7 @@ void cdloglog(ref CGstate cg, ref CodeBuilder cdb,elem* e,ref regm_t pretregs)
assert(cgstate.stackpush == stackpushsave);

assert(sz <= 4); // result better be int
// TODO AArch64
regm_t retregs = pretregs & (ALLREGS | mBP);
if (!retregs)
retregs = ALLREGS; // if mPSW only
Expand Down Expand Up @@ -1397,7 +1391,7 @@ void cdneg(ref CGstate cg, ref CodeBuilder cdb,elem* e,ref regm_t pretregs)
const sz = _tysize[tyml];
if (tyfloating(tyml))
{
assert(0);
assert(0); // TODO AArch64
}

const posregs = cgstate.allregs;
Expand Down Expand Up @@ -1456,7 +1450,7 @@ void cdabs(ref CGstate cg, ref CodeBuilder cdb,elem* e, ref regm_t pretregs)
const sz = _tysize[tyml];
if (tyfloating(tyml))
{
assert(0);
assert(0); // TODO AArch64
}

const posregs = cgstate.allregs;
Expand Down Expand Up @@ -1533,7 +1527,7 @@ void cdpost(ref CGstate cg, ref CodeBuilder cdb,elem* e,ref regm_t pretregs)
const sz = _tysize[tyml];
elem* e2 = e.E2;

if (0 && tyfloating(tyml))
if (0 && tyfloating(tyml)) // TODO AArch64
{
if (config.fpxmmregs && tyxmmreg(tyml) &&
!tycomplex(tyml) // SIMD code is not set up to deal with complex
Expand All @@ -1543,7 +1537,7 @@ void cdpost(ref CGstate cg, ref CodeBuilder cdb,elem* e,ref regm_t pretregs)
return;
}
}
if (0 && tyxmmreg(tyml))
if (0 && tyxmmreg(tyml)) // TODO AArch64
{
xmmpost(cdb,e,pretregs);
return;
Expand Down
57 changes: 14 additions & 43 deletions compiler/src/dmd/backend/arm/cod4.d
View file
Original file line number Diff line number Diff line change
Expand Up @@ -73,7 +73,7 @@ void cdeq(ref CGstate cg, ref CodeBuilder cdb,elem* e,ref regm_t pretregs)
regm_t retregs = pretregs;
regm_t allregs = tyfloating(tyml) ? INSTR.FLOATREGS : cgstate.allregs;

if (0 && tyxmmreg(tyml))
if (0 && tyxmmreg(tyml)) // TODO AArch64
{
xmmeq(cdb, e, CMP, e1, e2, pretregs);
return;
Expand Down Expand Up @@ -154,7 +154,7 @@ void cdeq(ref CGstate cg, ref CodeBuilder cdb,elem* e,ref regm_t pretregs)
!(sz == 1 && e1.Voffset == 1)
)
{
if (0 && varregm & XMMREGS)
if (0 && varregm & XMMREGS) // TODO AArch64
{
// Could be an integer vector in the XMMREGS
xmmeq(cdb, e, CMP, e1, e2, pretregs);
Expand Down Expand Up @@ -247,7 +247,7 @@ void cdaddass(ref CGstate cg, ref CodeBuilder cdb,elem* e,ref regm_t pretregs)
int isbyte = (sz == 1); // 1 for byte operation, else 0

// See if evaluate in XMM registers
if (0 && config.fpxmmregs && tyxmmreg(tyml) && op != OPnegass)
if (0 && config.fpxmmregs && tyxmmreg(tyml) && op != OPnegass) // TODO AArch64
{
xmmopass(cdb,e,pretregs);
return;
Expand Down Expand Up @@ -492,12 +492,11 @@ void floatOpAss(ref CodeBuilder cdb,elem* e,ref regm_t pretregs)
if (!rretregs)
rretregs = INSTR.FLOATREGS;

rretregs = 1L << 34; // until loaddata() works
codelem(cgstate,cdb,e2,rretregs,false); // eval right leaf
reg_t rreg = findreg(rretregs);

bool regvar = false;
if (0 && config.flags4 & CFG4optimized)
if (0 && config.flags4 & CFG4optimized) // TODO AArch64
{
// Be careful of cases like (x = x+x+x). We cannot evaluate in
// x if x is in a register.
Expand Down Expand Up @@ -587,7 +586,7 @@ void cdmulass(ref CGstate cg, ref CodeBuilder cdb,elem* e,ref regm_t pretregs)
uint sz = _tysize[tyml];

// See if evaluate in XMM registers
if (0 && config.fpxmmregs && tyxmmreg(tyml) && !(pretregs & mST0))
if (0 && config.fpxmmregs && tyxmmreg(tyml) && !(pretregs & mST0)) // TODO AArch64
{
xmmopass(cdb,e,pretregs);
return;
Expand Down Expand Up @@ -940,7 +939,7 @@ void cdcmp(ref CGstate cg, ref CodeBuilder cdb,elem* e,ref regm_t pretregs)
}
break;

static if (0)
static if (0) // TODO AArch64
{
case OPconst:
printf("OPconst:\n");
Expand Down Expand Up @@ -1229,7 +1228,7 @@ printf("OPconst:\n");
L3:
if ((retregs = (pretregs & cg.allregs)) != 0) // if return result in register
{
if (1 && !flag && !(jop & 0xFF00))
if (!flag && !(jop & 0xFF00))
{
regm_t resregs = retregs;
reg = allocreg(cdb,resregs,TYint);
Expand Down Expand Up @@ -1340,10 +1339,7 @@ void cdcnvt(ref CGstate cg, ref CodeBuilder cdb,elem* e, ref regm_t pretregs)
case OPd_u32: // fcvtzu w0,d31
case OPd_u64: // fcvtzu d31,d31 // fmov x0,d31
L2:
regm_t retregs1 = ALLREGS; //INSTR.FLOATREGS;
static if (1)
retregs1 = mCX; // hack because no floating support in rest of code
else
regm_t retregs1 = INSTR.FLOATREGS;
codelem(cgstate,cdb,e.E1,retregs1,false);
const reg_t V1 = findreg(retregs1); // source floating point register

Expand Down Expand Up @@ -1396,17 +1392,10 @@ else
codelem(cgstate,cdb,e.E1,retregs1,false);
reg_t R1 = findreg(retregs1);

static if (1)
{
regm_t retregs = mCX; // hack because no floating support in rest of code
reg_t Vd = CX;
}
else
{
regm_t retregs = FLOATREGS;
regm_t retregs = INSTR.FLOATREGS;
const tym = tybasic(e.Ety);
reg_t Vd = allocreg(cdb,retregs,tym); // destination integer register
}

switch (e.Eoper)
{
case OPs16_d:
Expand Down Expand Up @@ -1441,23 +1430,14 @@ else

case OPd_f: // fcvt d31,s31
case OPf_d: // fcvt s31,d31
regm_t retregs1 = ALLREGS; //INSTR.FLOATREGS;
static if (1)
retregs1 = mCX; // hack because no floating support in rest of code
else
regm_t retregs1 = INSTR.FLOATREGS;
codelem(cgstate,cdb,e.E1,retregs1,false);
const reg_t V1 = findreg(retregs1); // source floating point register

static if (1)
{
regm_t retregs = mDX;
}
else
{
regm_t retregs = pretregs & INSTR.FLOATREGS;
if (retregs == 0)
retregs = INSTR.FLOATREGS & cgstate.allregs;
}
retregs = INSTR.FLOATREGS;

const tym = tybasic(e.Ety);
reg_t Vd = allocreg(cdb,retregs,tym); // destination integer register

Expand Down Expand Up @@ -1588,15 +1568,6 @@ void cdshtlng(ref CGstate cg, ref CodeBuilder cdb,elem* e,ref regm_t pretregs)
else if (e1.Eoper == OPvar ||
(e1.Eoper == OPind && !e1.Ecount))
{
// OPs16_32
// EA: LDRSH x0,[sp,#8]
// reg: SXTH x0,w5
// OPu16_32
// EA: LDRH w0,[sp,#8]
// reg: AND x0,x5,#0xFFFF
// OPs32_64
// EA: LDRSW x0,[sp,#8]
// reg: SXTW x0,w5
code cs;
getlvalue(cdb,cs,e11,0,RM.load);
retregs = pretregs;
Expand Down Expand Up @@ -1781,7 +1752,7 @@ void cdbyteint(ref CGstate cg, ref CodeBuilder cdb,elem* e,ref regm_t pretregs)

// If previous instruction is an AND bytereg,value
c = cdb.last();
if (0 && c.Iop == 0x80 && c.Irm == modregrm(3,4,reg & 7) &&
if (0 && c.Iop == 0x80 && c.Irm == modregrm(3,4,reg & 7) && // TODO AArch64
(op == OPu8_16 || (c.IEV2.Vuns & 0x80) == 0))
{
if (pretregs & mPSW)
Expand Down
2 changes: 1 addition & 1 deletion compiler/src/dmd/backend/arm/disasmarm.d
View file
Original file line number Diff line number Diff line change
Expand Up @@ -2869,7 +2869,7 @@ unittest
"A9 01 7B FD stp x29,x30,[sp,#16]",
"A9 41 7B FD ldp x29,x30,[sp,#16]",
"B9 40 0B E0 ldr w0,[sp,#8]",
"F9 00 5F E3 str x3,[sp,#0xB8]",
"F9 00 5F E3 str x3,[sp,#0xB8]",

"39 C0 00 20 ldrsb w0,[x1]",
"39 40 00 20 ldrb w0,[x1]",
Expand Down

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