change register count to 64 registers (#20821)

dlang · Feb 5, 2025 · bf454f0 · bf454f0
1 parent 89b93e8
commit bf454f0
Show file tree

Hide file tree

Showing 4 changed files with 13 additions and 12 deletions.
diff --git a/compiler/src/dmd/backend/arm/instr.d b/compiler/src/dmd/backend/arm/instr.d
@@ -42,7 +42,8 @@ struct INSTR
     /* Even though the floating point registers are 0..31, we call them V32..V63 so they fit
      * into regm_t. Remember to and them with 31 to generate an instruction
      */
-    enum FLOATREGS = 0xFFFF_FFFF_0000_0000;
+    enum FLOATREGS = 0x01FF_FFFF_0000_0000;
+    static assert((FLOATREGS & (1UL << 57 /*REGMAX*/)) == 0);
 
     enum uint nop = 0xD503201F;
 

diff --git a/compiler/src/dmd/backend/cdef.d b/compiler/src/dmd/backend/cdef.d
@@ -180,7 +180,7 @@ enum
     DGROUPIDX = 1,     // group index of DGROUP
 }
 
-enum REGMAX = 32;      // registers are numbered 0...31
+enum REGMAX = 57;      // registers are numbered 0...63
 enum reg_t NOREG = REGMAX;  // no register
 
 alias tym_t = uint;    // data type big enough for type masks

diff --git a/compiler/src/dmd/backend/x86/cgcod.d b/compiler/src/dmd/backend/x86/cgcod.d
@@ -1818,7 +1818,7 @@ regm_t lpadregs()
 void useregs(regm_t regm)
 {
     //printf("useregs(x%llx) %s\n", regm, regm_str(regm));
-    assert(REGMAX <= 32);
+    assert(REGMAX < 64);
     regm &= (1UL << REGMAX) - 1;
     assert(!(regm & mPSW));
     cgstate.mfuncreg &= ~regm;

diff --git a/compiler/src/dmd/backend/x86/cod3.d b/compiler/src/dmd/backend/x86/cod3.d
@@ -1144,7 +1144,7 @@ static if (NTEXCEPTIONS)
             retregs = allocretregs(cgstate, e.Ety, e.ET, funcsym_p.ty(), reg1, reg2);
             //printf("allocretregs returns %s\n", regm_str(mask(reg1) | mask(reg2)));
 
-	    reg_t lreg = NOREG;
+            reg_t lreg = NOREG;
             reg_t mreg = NOREG;
             if (reg1 == NOREG)
             {}
@@ -1487,11 +1487,11 @@ regm_t allocretregs(ref CGstate cgstate, const tym_t ty, type* t, const tym_t ty
     nothrow:
         static immutable reg_t[2] gpr_regs = [AX, DX];
         static immutable reg_t[2] xmm_regs = [XMM0, XMM1];
-	static immutable reg_t[2] fpt_regs = [32, 33]; // AArch64 V0, V1
+        static immutable reg_t[2] fpt_regs = [32, 33]; // AArch64 V0, V1
 
         uint cntgpr = 0,
              cntxmm = 0,
-	     cntfpt = 0;
+             cntfpt = 0;
 
         reg_t gpr() { return gpr_regs[cntgpr++]; }
         reg_t xmm() { return xmm_regs[cntxmm++]; }
@@ -1510,18 +1510,18 @@ regm_t allocretregs(ref CGstate cgstate, const tym_t ty, type* t, const tym_t ty
         case 2:
         case 4:
             if (tyfloating(tym))
-	    {
-		if (AArch64)
-		    return rralloc.fpt();
+            {
+                if (AArch64)
+                    return rralloc.fpt();
                 return I64 ? rralloc.xmm() : ST0;
-	    }
+            }
             else
                 return rralloc.gpr();
 
         case 8:
             if (tycomplex(tym))
             {
-		assert(!AArch64);
+                assert(!AArch64);
                 assert(tyfb == TYjfunc && I32);
                 return ST01;
             }
@@ -1533,7 +1533,7 @@ regm_t allocretregs(ref CGstate cgstate, const tym_t ty, type* t, const tym_t ty
             goto case 4;
 
         default:
-	    assert(!AArch64);
+            assert(!AArch64);
             if (tybasic(tym) == TYldouble || tybasic(tym) == TYildouble)
             {
                 return ST0;