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Resolve conflicts when merging with main
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@khushal1996
khushal1996 committed Nov 12, 2024
1 parent 3a53e0c commit 738cff9
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Showing 3 changed files with 96 additions and 164 deletions.
118 changes: 42 additions & 76 deletions src/coreclr/inc/corinfoinstructionset.h
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Original file line number Diff line number Diff line change
Expand Up @@ -78,36 +78,40 @@ enum CORINFO_InstructionSet
InstructionSet_AVX512VBMI_VL=33,
InstructionSet_AVX10v1=34,
InstructionSet_AVX10v1_V512=35,
InstructionSet_VectorT128=36,
InstructionSet_VectorT256=37,
InstructionSet_VectorT512=38,
InstructionSet_X86Base_X64=39,
InstructionSet_SSE_X64=40,
InstructionSet_SSE2_X64=41,
InstructionSet_SSE3_X64=42,
InstructionSet_SSSE3_X64=43,
InstructionSet_SSE41_X64=44,
InstructionSet_SSE42_X64=45,
InstructionSet_AVX_X64=46,
InstructionSet_AVX2_X64=47,
InstructionSet_AES_X64=48,
InstructionSet_BMI1_X64=49,
InstructionSet_BMI2_X64=50,
InstructionSet_FMA_X64=51,
InstructionSet_LZCNT_X64=52,
InstructionSet_PCLMULQDQ_X64=53,
InstructionSet_POPCNT_X64=54,
InstructionSet_AVXVNNI_X64=55,
InstructionSet_MOVBE_X64=56,
InstructionSet_X86Serialize_X64=57,
InstructionSet_EVEX_X64=58,
InstructionSet_AVX512F_X64=59,
InstructionSet_AVX512BW_X64=60,
InstructionSet_AVX512CD_X64=61,
InstructionSet_AVX512DQ_X64=62,
InstructionSet_AVX512VBMI_X64=63,
InstructionSet_AVX10v1_X64=64,
InstructionSet_AVX10v1_V512_X64=65,
InstructionSet_AVX10v2=36,
InstructionSet_AVX10v2_V512=37,
InstructionSet_VectorT128=38,
InstructionSet_VectorT256=39,
InstructionSet_VectorT512=40,
InstructionSet_X86Base_X64=41,
InstructionSet_SSE_X64=42,
InstructionSet_SSE2_X64=43,
InstructionSet_SSE3_X64=44,
InstructionSet_SSSE3_X64=45,
InstructionSet_SSE41_X64=46,
InstructionSet_SSE42_X64=47,
InstructionSet_AVX_X64=48,
InstructionSet_AVX2_X64=49,
InstructionSet_AES_X64=50,
InstructionSet_BMI1_X64=51,
InstructionSet_BMI2_X64=52,
InstructionSet_FMA_X64=53,
InstructionSet_LZCNT_X64=54,
InstructionSet_PCLMULQDQ_X64=55,
InstructionSet_POPCNT_X64=56,
InstructionSet_AVXVNNI_X64=57,
InstructionSet_MOVBE_X64=58,
InstructionSet_X86Serialize_X64=59,
InstructionSet_EVEX_X64=60,
InstructionSet_AVX512F_X64=61,
InstructionSet_AVX512BW_X64=62,
InstructionSet_AVX512CD_X64=63,
InstructionSet_AVX512DQ_X64=64,
InstructionSet_AVX512VBMI_X64=65,
InstructionSet_AVX10v1_X64=66,
InstructionSet_AVX10v1_V512_X64=67,
InstructionSet_AVX10v2_X64=68,
InstructionSet_AVX10v2_V512_X64=69,
#endif // TARGET_AMD64
#ifdef TARGET_X86
InstructionSet_X86Base=1,
Expand Down Expand Up @@ -145,38 +149,6 @@ enum CORINFO_InstructionSet
InstructionSet_AVX512VBMI_VL=33,
InstructionSet_AVX10v1=34,
InstructionSet_AVX10v1_V512=35,
<<<<<<< HEAD
InstructionSet_VectorT128=36,
InstructionSet_VectorT256=37,
InstructionSet_VectorT512=38,
InstructionSet_X86Base_X64=39,
InstructionSet_SSE_X64=40,
InstructionSet_SSE2_X64=41,
InstructionSet_SSE3_X64=42,
InstructionSet_SSSE3_X64=43,
InstructionSet_SSE41_X64=44,
InstructionSet_SSE42_X64=45,
InstructionSet_AVX_X64=46,
InstructionSet_AVX2_X64=47,
InstructionSet_AES_X64=48,
InstructionSet_BMI1_X64=49,
InstructionSet_BMI2_X64=50,
InstructionSet_FMA_X64=51,
InstructionSet_LZCNT_X64=52,
InstructionSet_PCLMULQDQ_X64=53,
InstructionSet_POPCNT_X64=54,
InstructionSet_AVXVNNI_X64=55,
InstructionSet_MOVBE_X64=56,
InstructionSet_X86Serialize_X64=57,
InstructionSet_EVEX_X64=58,
InstructionSet_AVX512F_X64=59,
InstructionSet_AVX512BW_X64=60,
InstructionSet_AVX512CD_X64=61,
InstructionSet_AVX512DQ_X64=62,
InstructionSet_AVX512VBMI_X64=63,
InstructionSet_AVX10v1_X64=64,
InstructionSet_AVX10v1_V512_X64=65,
=======
InstructionSet_AVX10v2=36,
InstructionSet_AVX10v2_V512=37,
InstructionSet_VectorT128=38,
Expand All @@ -203,20 +175,14 @@ enum CORINFO_InstructionSet
InstructionSet_X86Serialize_X64=59,
InstructionSet_EVEX_X64=60,
InstructionSet_AVX512F_X64=61,
InstructionSet_AVX512F_VL_X64=62,
InstructionSet_AVX512BW_X64=63,
InstructionSet_AVX512BW_VL_X64=64,
InstructionSet_AVX512CD_X64=65,
InstructionSet_AVX512CD_VL_X64=66,
InstructionSet_AVX512DQ_X64=67,
InstructionSet_AVX512DQ_VL_X64=68,
InstructionSet_AVX512VBMI_X64=69,
InstructionSet_AVX512VBMI_VL_X64=70,
InstructionSet_AVX10v1_X64=71,
InstructionSet_AVX10v1_V512_X64=72,
InstructionSet_AVX10v2_X64=73,
InstructionSet_AVX10v2_V512_X64=74,
>>>>>>> a55717e80fd (Add CPUID for AVX10v2)
InstructionSet_AVX512BW_X64=62,
InstructionSet_AVX512CD_X64=63,
InstructionSet_AVX512DQ_X64=64,
InstructionSet_AVX512VBMI_X64=65,
InstructionSet_AVX10v1_X64=66,
InstructionSet_AVX10v1_V512_X64=67,
InstructionSet_AVX10v2_X64=68,
InstructionSet_AVX10v2_V512_X64=69,
#endif // TARGET_X86

};
Expand Down
10 changes: 5 additions & 5 deletions src/coreclr/inc/jiteeversionguid.h
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Original file line number Diff line number Diff line change
Expand Up @@ -43,11 +43,11 @@ typedef const GUID *LPCGUID;
#define GUID_DEFINED
#endif // !GUID_DEFINED

constexpr GUID JITEEVersionIdentifier = { /* c75035da-c692-4ef8-b84e-fbb44fd0f246 */
0xc75035da,
0xc692,
0x4ef8,
{0xb8, 0x4e, 0xfb, 0xb4, 0x4f, 0xd0, 0xf2, 0x46}
constexpr GUID JITEEVersionIdentifier = { /* df94d07f-8266-4e67-bd7a-f710cb15c13c */
0xdf94d07f,
0x8266,
0x4e67,
{0xbd, 0x7a, 0xf7, 0x10, 0xcb, 0x15, 0xc1, 0x3c}
};

//////////////////////////////////////////////////////////////////////////////////////////////////////////
Expand Down
132 changes: 49 additions & 83 deletions src/coreclr/tools/Common/JitInterface/CorInfoInstructionSet.cs
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Original file line number Diff line number Diff line change
Expand Up @@ -250,36 +250,40 @@ public enum InstructionSet_X64
AVX512VBMI_VL = 33,
AVX10v1 = 34,
AVX10v1_V512 = 35,
VectorT128 = 36,
VectorT256 = 37,
VectorT512 = 38,
X86Base_X64 = 39,
SSE_X64 = 40,
SSE2_X64 = 41,
SSE3_X64 = 42,
SSSE3_X64 = 43,
SSE41_X64 = 44,
SSE42_X64 = 45,
AVX_X64 = 46,
AVX2_X64 = 47,
AES_X64 = 48,
BMI1_X64 = 49,
BMI2_X64 = 50,
FMA_X64 = 51,
LZCNT_X64 = 52,
PCLMULQDQ_X64 = 53,
POPCNT_X64 = 54,
AVXVNNI_X64 = 55,
MOVBE_X64 = 56,
X86Serialize_X64 = 57,
EVEX_X64 = 58,
AVX512F_X64 = 59,
AVX512BW_X64 = 60,
AVX512CD_X64 = 61,
AVX512DQ_X64 = 62,
AVX512VBMI_X64 = 63,
AVX10v1_X64 = 64,
AVX10v1_V512_X64 = 65,
AVX10v2 = 36,
AVX10v2_V512 = 37,
VectorT128 = 38,
VectorT256 = 39,
VectorT512 = 40,
X86Base_X64 = 41,
SSE_X64 = 42,
SSE2_X64 = 43,
SSE3_X64 = 44,
SSSE3_X64 = 45,
SSE41_X64 = 46,
SSE42_X64 = 47,
AVX_X64 = 48,
AVX2_X64 = 49,
AES_X64 = 50,
BMI1_X64 = 51,
BMI2_X64 = 52,
FMA_X64 = 53,
LZCNT_X64 = 54,
PCLMULQDQ_X64 = 55,
POPCNT_X64 = 56,
AVXVNNI_X64 = 57,
MOVBE_X64 = 58,
X86Serialize_X64 = 59,
EVEX_X64 = 60,
AVX512F_X64 = 61,
AVX512BW_X64 = 62,
AVX512CD_X64 = 63,
AVX512DQ_X64 = 64,
AVX512VBMI_X64 = 65,
AVX10v1_X64 = 66,
AVX10v1_V512_X64 = 67,
AVX10v2_X64 = 68,
AVX10v2_V512_X64 = 69,
}

public enum InstructionSet_X86
Expand Down Expand Up @@ -321,38 +325,6 @@ public enum InstructionSet_X86
AVX512VBMI_VL = 33,
AVX10v1 = 34,
AVX10v1_V512 = 35,
<<<<<<< HEAD
VectorT128 = 36,
VectorT256 = 37,
VectorT512 = 38,
X86Base_X64 = 39,
SSE_X64 = 40,
SSE2_X64 = 41,
SSE3_X64 = 42,
SSSE3_X64 = 43,
SSE41_X64 = 44,
SSE42_X64 = 45,
AVX_X64 = 46,
AVX2_X64 = 47,
AES_X64 = 48,
BMI1_X64 = 49,
BMI2_X64 = 50,
FMA_X64 = 51,
LZCNT_X64 = 52,
PCLMULQDQ_X64 = 53,
POPCNT_X64 = 54,
AVXVNNI_X64 = 55,
MOVBE_X64 = 56,
X86Serialize_X64 = 57,
EVEX_X64 = 58,
AVX512F_X64 = 59,
AVX512BW_X64 = 60,
AVX512CD_X64 = 61,
AVX512DQ_X64 = 62,
AVX512VBMI_X64 = 63,
AVX10v1_X64 = 64,
AVX10v1_V512_X64 = 65,
=======
AVX10v2 = 36,
AVX10v2_V512 = 37,
VectorT128 = 38,
Expand All @@ -379,20 +351,14 @@ public enum InstructionSet_X86
X86Serialize_X64 = 59,
EVEX_X64 = 60,
AVX512F_X64 = 61,
AVX512F_VL_X64 = 62,
AVX512BW_X64 = 63,
AVX512BW_VL_X64 = 64,
AVX512CD_X64 = 65,
AVX512CD_VL_X64 = 66,
AVX512DQ_X64 = 67,
AVX512DQ_VL_X64 = 68,
AVX512VBMI_X64 = 69,
AVX512VBMI_VL_X64 = 70,
AVX10v1_X64 = 71,
AVX10v1_V512_X64 = 72,
AVX10v2_X64 = 73,
AVX10v2_V512_X64 = 74,
>>>>>>> a55717e80fd (Add CPUID for AVX10v2)
AVX512BW_X64 = 62,
AVX512CD_X64 = 63,
AVX512DQ_X64 = 64,
AVX512VBMI_X64 = 65,
AVX10v1_X64 = 66,
AVX10v1_V512_X64 = 67,
AVX10v2_X64 = 68,
AVX10v2_V512_X64 = 69,
}

public unsafe struct InstructionSetFlags : IEnumerable<InstructionSet>
Expand Down Expand Up @@ -1920,13 +1886,13 @@ public static InstructionSet LookupPlatformIntrinsicInstructionSet(TargetArchite
if (nestedTypeName == "X64")
{ return InstructionSet.X64_AVX10v2_X64; }
else
{ return InstructionSet.X64_AVX10v2; }

case "Avx10v2_V512":
if (nestedTypeName == "X64")
if (nestedTypeName == "V512_X64")
{ return InstructionSet.X64_AVX10v2_V512_X64; }
else
if (nestedTypeName == "V512")
{ return InstructionSet.X64_AVX10v2_V512; }
else
{ return InstructionSet.X64_AVX10v2; }

case "VectorT128":
{ return InstructionSet.X64_VectorT128; }
Expand Down Expand Up @@ -2041,10 +2007,10 @@ public static InstructionSet LookupPlatformIntrinsicInstructionSet(TargetArchite
{ return InstructionSet.X86_AVX10v1; }

case "Avx10v2":
{ return InstructionSet.X86_AVX10v2; }

case "Avx10v2_V512":
if (nestedTypeName == "V512")
{ return InstructionSet.X86_AVX10v2_V512; }
else
{ return InstructionSet.X86_AVX10v2; }

case "VectorT128":
{ return InstructionSet.X86_VectorT128; }
Expand Down

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