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llvm: Update baseline to 163935a48df69bde944fae2b4581541dab30c730
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github-actions[bot] committed Jan 23, 2025
1 parent 2c93f77 commit 55638a0
Showing 1 changed file with 1 addition and 1 deletion.
2 changes: 1 addition & 1 deletion llvm/llvm-project
Submodule llvm-project updated 38 files
+14 −0 clang/docs/ReleaseNotes.rst
+2 −3 clang/include/clang/AST/UnresolvedSet.h
+4 −0 clang/include/clang/Driver/Options.td
+6 −1 clang/lib/Basic/Targets/LoongArch.cpp
+2 −0 clang/lib/Basic/Targets/LoongArch.h
+2 −0 clang/lib/Driver/ToolChains/Arch/LoongArch.cpp
+4 −4 clang/test/Driver/loongarch-march.c
+30 −0 clang/test/Driver/loongarch-mscq.c
+1 −0 clang/test/Driver/print-supported-extensions-riscv.c
+20 −11 clang/test/Preprocessor/init-loongarch.c
+2 −0 lld/docs/ReleaseNotes.rst
+3 −0 llvm/docs/RISCVUsage.rst
+62 −1 llvm/docs/ReleaseNotes.md
+2 −1 llvm/include/llvm/TargetParser/LoongArchTargetParser.def
+3 −0 llvm/include/llvm/TargetParser/LoongArchTargetParser.h
+8 −1 llvm/lib/Target/LoongArch/LoongArch.td
+110 −0 llvm/lib/Target/LoongArch/LoongArchExpandAtomicPseudoInsts.cpp
+46 −0 llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
+14 −0 llvm/lib/Target/LoongArch/LoongArchInstrInfo.td
+13 −0 llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
+26 −2 llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
+1 −0 llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
+8 −0 llvm/lib/Target/RISCV/RISCVFeatures.td
+1 −0 llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
+80 −0 llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
+1 −1 llvm/lib/TargetParser/Host.cpp
+1 −0 llvm/lib/TargetParser/LoongArchTargetParser.cpp
+2 −2 llvm/lib/TargetParser/RISCVISAInfo.cpp
+352 −0 llvm/test/CodeGen/LoongArch/ir-instruction/atomic-cmpxchg-128.ll
+2 −0 llvm/test/CodeGen/RISCV/attributes.ll
+50 −0 llvm/test/MC/RISCV/xqcilo-aliases-valid.s
+108 −0 llvm/test/MC/RISCV/xqcilo-invalid.s
+114 −0 llvm/test/MC/RISCV/xqcilo-valid.s
+5 −0 llvm/test/tools/llvm-exegesis/X86/inverse_throughput/inverse_throughput-prepare-all-snippets-exhaustively.s
+5 −0 llvm/test/tools/llvm-exegesis/X86/inverse_throughput/inverse_throughput-prepare-all-snippets.s
+5 −0 llvm/test/tools/llvm-exegesis/X86/uops/uops-prepare-all-snippets-exhaustively.s
+5 −0 llvm/test/tools/llvm-exegesis/X86/uops/uops-prepare-all-snippets.s
+3 −1 llvm/unittests/TargetParser/RISCVISAInfoTest.cpp

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