pre-commit: test PR88183

bench/cmake/optimized/cfilters.c.ll

@@ -1817,7 +1817,7 @@ define dso_local void @Curl_pollset_set(ptr nocapture noundef readnone %0, ptr n
   br i1 %exitcond.not.i, label %._crit_edge.i, label %.lr.ph.i, !llvm.loop !20
 
 ._crit_edge.i:                                    ; preds = %43, %.preheader.i
-  %44 = icmp ne i32 %8, 0
+  %44 = or i1 %3, %4
   %45 = icmp ult i32 %15, 5
   %or.cond.i = and i1 %44, %45
   br i1 %or.cond.i, label %46, label %Curl_pollset_change.exit

bench/curl/optimized/libcurl_la-cfilters.ll

@@ -1867,7 +1867,7 @@ for.inc.i:                                        ; preds = %for.body.i
   br i1 %exitcond.not.i, label %for.end.i, label %for.body.i, !llvm.loop !19
 
 for.end.i:                                        ; preds = %for.inc.i, %for.cond.preheader.i
-  %tobool56.i = icmp ne i32 %or, 0
+  %tobool56.i = or i1 %do_in, %do_out
   %cmp60.i = icmp ult i32 %0, 5
   %or.cond.i = and i1 %tobool56.i, %cmp60.i
   br i1 %or.cond.i, label %if.then62.i, label %Curl_pollset_change.exit

bench/jemalloc/optimized/jemalloc.ll

@@ -14165,11 +14165,12 @@ if.end22:                                         ; preds = %if.end18
   %or11.i.i = or i8 %or8.i.i, %46
   %or12.i.i = or i8 %or11.i.i, %cond10.i.i
   store i8 %or12.i.i, ptr @malloc_slow_flags, align 1
-  %cmp.i.i62 = icmp ne i8 %or12.i.i, 0
+  %47 = icmp ne i8 %or11.i.i, 0
+  %cmp.i.i62 = or i1 %47, %tobool9.i.i
   %frombool.i.i = zext i1 %cmp.i.i62 to i8
   store i8 %frombool.i.i, ptr @malloc_slow, align 1
-  %47 = load i8, ptr %cant_access_tsd_items_directly_use_a_getter_or_setter_reentrancy_level.i.i.i, align 1
-  %dec.i.i = add i8 %47, -1
+  %48 = load i8, ptr %cant_access_tsd_items_directly_use_a_getter_or_setter_reentrancy_level.i.i.i, align 1
+  %dec.i.i = add i8 %48, -1
   store i8 %dec.i.i, ptr %cant_access_tsd_items_directly_use_a_getter_or_setter_reentrancy_level.i.i.i, align 1
   %cmp.i.i64 = icmp eq i8 %dec.i.i, 0
   br i1 %cmp.i.i64, label %if.then.i.i65, label %post_reentrancy.exit
@@ -14182,20 +14183,20 @@ post_reentrancy.exit:                             ; preds = %if.end22, %if.then.
   store atomic i8 0, ptr getelementptr inbounds (%struct.malloc_mutex_s, ptr @init_lock, i64 0, i32 0, i32 0, i32 1, i32 0) monotonic, align 8
   %call1.i66 = call i32 @pthread_mutex_unlock(ptr noundef nonnull getelementptr inbounds (%struct.malloc_mutex_s, ptr @init_lock, i64 0, i32 0, i32 0, i32 2, i32 0, i32 0)) #19
   call void @malloc_tsd_boot1() #19
-  %48 = call align 8 ptr @llvm.threadlocal.address.p0(ptr align 8 @tsd_tls)
-  %state.i.i = getelementptr inbounds i8, ptr %48, i64 824
-  %49 = load i8, ptr %state.i.i, align 8
-  %cmp6.i.not = icmp eq i8 %49, 0
+  %49 = call align 8 ptr @llvm.threadlocal.address.p0(ptr align 8 @tsd_tls)
+  %state.i.i = getelementptr inbounds i8, ptr %49, i64 824
+  %50 = load i8, ptr %state.i.i, align 8
+  %cmp6.i.not = icmp eq i8 %50, 0
   br i1 %cmp6.i.not, label %tsd_fetch_impl.exit, label %if.then11.i
 
 if.then11.i:                                      ; preds = %post_reentrancy.exit
-  %call13.i = call ptr @tsd_fetch_slow(ptr noundef nonnull %48, i1 noundef zeroext false) #19
+  %call13.i = call ptr @tsd_fetch_slow(ptr noundef nonnull %49, i1 noundef zeroext false) #19
   br label %tsd_fetch_impl.exit
 
 tsd_fetch_impl.exit:                              ; preds = %post_reentrancy.exit, %if.then11.i
-  %retval.i.0 = phi ptr [ %call13.i, %if.then11.i ], [ %48, %post_reentrancy.exit ]
-  %50 = load i8, ptr @opt_background_thread, align 1
-  %tobool = trunc i8 %50 to i1
+  %retval.i.0 = phi ptr [ %call13.i, %if.then11.i ], [ %49, %post_reentrancy.exit ]
+  %51 = load i8, ptr @opt_background_thread, align 1
+  %tobool = trunc i8 %51 to i1
   br i1 %tobool, label %do.end, label %if.end32
 
 do.end:                                           ; preds = %tsd_fetch_impl.exit

bench/jemalloc/optimized/jemalloc.pic.ll

@@ -14165,11 +14165,12 @@ if.end22:                                         ; preds = %if.end18
   %or11.i.i = or i8 %or8.i.i, %46
   %or12.i.i = or i8 %or11.i.i, %cond10.i.i
   store i8 %or12.i.i, ptr @malloc_slow_flags, align 1
-  %cmp.i.i62 = icmp ne i8 %or12.i.i, 0
+  %47 = icmp ne i8 %or11.i.i, 0
+  %cmp.i.i62 = or i1 %47, %tobool9.i.i
   %frombool.i.i = zext i1 %cmp.i.i62 to i8
   store i8 %frombool.i.i, ptr @malloc_slow, align 1
-  %47 = load i8, ptr %cant_access_tsd_items_directly_use_a_getter_or_setter_reentrancy_level.i.i.i, align 1
-  %dec.i.i = add i8 %47, -1
+  %48 = load i8, ptr %cant_access_tsd_items_directly_use_a_getter_or_setter_reentrancy_level.i.i.i, align 1
+  %dec.i.i = add i8 %48, -1
   store i8 %dec.i.i, ptr %cant_access_tsd_items_directly_use_a_getter_or_setter_reentrancy_level.i.i.i, align 1
   %cmp.i.i64 = icmp eq i8 %dec.i.i, 0
   br i1 %cmp.i.i64, label %if.then.i.i65, label %post_reentrancy.exit
@@ -14182,20 +14183,20 @@ post_reentrancy.exit:                             ; preds = %if.end22, %if.then.
   store atomic i8 0, ptr getelementptr inbounds (%struct.malloc_mutex_s, ptr @init_lock, i64 0, i32 0, i32 0, i32 1, i32 0) monotonic, align 8
   %call1.i66 = call i32 @pthread_mutex_unlock(ptr noundef nonnull getelementptr inbounds (%struct.malloc_mutex_s, ptr @init_lock, i64 0, i32 0, i32 0, i32 2, i32 0, i32 0)) #19
   call void @malloc_tsd_boot1() #19
-  %48 = call align 8 ptr @llvm.threadlocal.address.p0(ptr align 8 @tsd_tls)
-  %state.i.i = getelementptr inbounds i8, ptr %48, i64 824
-  %49 = load i8, ptr %state.i.i, align 8
-  %cmp6.i.not = icmp eq i8 %49, 0
+  %49 = call align 8 ptr @llvm.threadlocal.address.p0(ptr align 8 @tsd_tls)
+  %state.i.i = getelementptr inbounds i8, ptr %49, i64 824
+  %50 = load i8, ptr %state.i.i, align 8
+  %cmp6.i.not = icmp eq i8 %50, 0
   br i1 %cmp6.i.not, label %tsd_fetch_impl.exit, label %if.then11.i
 
 if.then11.i:                                      ; preds = %post_reentrancy.exit
-  %call13.i = call ptr @tsd_fetch_slow(ptr noundef nonnull %48, i1 noundef zeroext false) #19
+  %call13.i = call ptr @tsd_fetch_slow(ptr noundef nonnull %49, i1 noundef zeroext false) #19
   br label %tsd_fetch_impl.exit
 
 tsd_fetch_impl.exit:                              ; preds = %post_reentrancy.exit, %if.then11.i
-  %retval.i.0 = phi ptr [ %call13.i, %if.then11.i ], [ %48, %post_reentrancy.exit ]
-  %50 = load i8, ptr @opt_background_thread, align 1
-  %tobool = trunc i8 %50 to i1
+  %retval.i.0 = phi ptr [ %call13.i, %if.then11.i ], [ %49, %post_reentrancy.exit ]
+  %51 = load i8, ptr @opt_background_thread, align 1
+  %tobool = trunc i8 %51 to i1
   br i1 %tobool, label %do.end, label %if.end32
 
 do.end:                                           ; preds = %tsd_fetch_impl.exit

bench/jemalloc/optimized/jemalloc.sym.ll

@@ -14165,11 +14165,12 @@ if.end22:                                         ; preds = %if.end18
   %or11.i.i = or i8 %or8.i.i, %46
   %or12.i.i = or i8 %or11.i.i, %cond10.i.i
   store i8 %or12.i.i, ptr @malloc_slow_flags, align 1
-  %cmp.i.i62 = icmp ne i8 %or12.i.i, 0
+  %47 = icmp ne i8 %or11.i.i, 0
+  %cmp.i.i62 = or i1 %47, %tobool9.i.i
   %frombool.i.i = zext i1 %cmp.i.i62 to i8
   store i8 %frombool.i.i, ptr @malloc_slow, align 1
-  %47 = load i8, ptr %cant_access_tsd_items_directly_use_a_getter_or_setter_reentrancy_level.i.i.i, align 1
-  %dec.i.i = add i8 %47, -1
+  %48 = load i8, ptr %cant_access_tsd_items_directly_use_a_getter_or_setter_reentrancy_level.i.i.i, align 1
+  %dec.i.i = add i8 %48, -1
   store i8 %dec.i.i, ptr %cant_access_tsd_items_directly_use_a_getter_or_setter_reentrancy_level.i.i.i, align 1
   %cmp.i.i64 = icmp eq i8 %dec.i.i, 0
   br i1 %cmp.i.i64, label %if.then.i.i65, label %post_reentrancy.exit
@@ -14182,20 +14183,20 @@ post_reentrancy.exit:                             ; preds = %if.end22, %if.then.
   store atomic i8 0, ptr getelementptr inbounds (%struct.malloc_mutex_s, ptr @init_lock, i64 0, i32 0, i32 0, i32 1, i32 0) monotonic, align 8
   %call1.i66 = call i32 @pthread_mutex_unlock(ptr noundef nonnull getelementptr inbounds (%struct.malloc_mutex_s, ptr @init_lock, i64 0, i32 0, i32 0, i32 2, i32 0, i32 0)) #19
   call void @malloc_tsd_boot1() #19
-  %48 = call align 8 ptr @llvm.threadlocal.address.p0(ptr align 8 @tsd_tls)
-  %state.i.i = getelementptr inbounds i8, ptr %48, i64 824
-  %49 = load i8, ptr %state.i.i, align 8
-  %cmp6.i.not = icmp eq i8 %49, 0
+  %49 = call align 8 ptr @llvm.threadlocal.address.p0(ptr align 8 @tsd_tls)
+  %state.i.i = getelementptr inbounds i8, ptr %49, i64 824
+  %50 = load i8, ptr %state.i.i, align 8
+  %cmp6.i.not = icmp eq i8 %50, 0
   br i1 %cmp6.i.not, label %tsd_fetch_impl.exit, label %if.then11.i
 
 if.then11.i:                                      ; preds = %post_reentrancy.exit
-  %call13.i = call ptr @tsd_fetch_slow(ptr noundef nonnull %48, i1 noundef zeroext false) #19
+  %call13.i = call ptr @tsd_fetch_slow(ptr noundef nonnull %49, i1 noundef zeroext false) #19
   br label %tsd_fetch_impl.exit
 
 tsd_fetch_impl.exit:                              ; preds = %post_reentrancy.exit, %if.then11.i
-  %retval.i.0 = phi ptr [ %call13.i, %if.then11.i ], [ %48, %post_reentrancy.exit ]
-  %50 = load i8, ptr @opt_background_thread, align 1
-  %tobool = trunc i8 %50 to i1
+  %retval.i.0 = phi ptr [ %call13.i, %if.then11.i ], [ %49, %post_reentrancy.exit ]
+  %51 = load i8, ptr @opt_background_thread, align 1
+  %tobool = trunc i8 %51 to i1
   br i1 %tobool, label %do.end, label %if.end32
 
 do.end:                                           ; preds = %tsd_fetch_impl.exit

bench/libquic/optimized/time_posix.cc.ll

@@ -394,24 +394,19 @@ if.else.i.i.i.i.i:                                ; preds = %if.end.i
   %cmp26.i.i.i.i.i = icmp eq i32 %cond10.sink.i.i.i.i.i, 0
   %mul.i.i.i.i.i = mul nsw i64 %ts.val.i, 1000000
   %cond27.i.i.i.i.i = select i1 %cmp26.i.i.i.i.i, i64 %mul.i.i.i.i.i, i64 0
-  %1 = trunc i32 %cond10.sink.i.i.i.i.i to i8
   br label %_ZN4base8internal14CheckedNumericIlEmLIlEERS2_T_.exit.i.i
 
 _ZN4base8internal14CheckedNumericIlEmLIlEERS2_T_.exit.i.i: ; preds = %if.else.i.i.i.i.i, %if.end.i
-  %validity.0.i.i.i.i = phi i8 [ %1, %if.else.i.i.i.i.i ], [ 0, %if.end.i ]
+  %validity.0.i.i.i.i = phi i1 [ %cmp26.i.i.i.i.i, %if.else.i.i.i.i.i ], [ true, %if.end.i ]
   %retval.0.i.i.i.i.i = phi i64 [ %cond27.i.i.i.i.i, %if.else.i.i.i.i.i ], [ 0, %if.end.i ]
   %div.i.i = sdiv i64 %ts.val1.i, 1000
   %add.i.i.i.i.i = add i64 %retval.0.i.i.i.i.i, %div.i.i
   %xor.i.i.i.i.i = xor i64 %add.i.i.i.i.i, %retval.0.i.i.i.i.i
   %xor1.i.i.i.i.i = xor i64 %add.i.i.i.i.i, %div.i.i
   %and.i.i.i.i.i = and i64 %xor.i.i.i.i.i, %xor1.i.i.i.i.i
   %tobool.i.i.i.i.i.i = icmp sgt i64 %and.i.i.i.i.i, -1
-  %tobool.i7.i.i.i.i.i = icmp slt i64 %add.i.i.i.i.i, 0
-  %cond.i.i.i2.i.i = select i1 %tobool.i7.i.i.i.i.i, i8 2, i8 1
-  %storemerge.i.i.i.i.i = select i1 %tobool.i.i.i.i.i.i, i8 0, i8 %cond.i.i.i2.i.i
-  %or5.i.i.i.i = or i8 %storemerge.i.i.i.i.i, %validity.0.i.i.i.i
   call void @llvm.lifetime.start.p0(i64 408, ptr nonnull %ref.tmp2.i.i.i)
-  %cmp.i.i.i.i = icmp eq i8 %or5.i.i.i.i, 0
+  %cmp.i.i.i.i = and i1 %validity.0.i.i.i.i, %tobool.i.i.i.i.i.i
   br i1 %cmp.i.i.i.i, label %_ZN12_GLOBAL__N_123ConvertTimespecToMicrosERK8timespec.exit.i, label %cond.false.i.i.i
 
 cond.false.i.i.i:                                 ; preds = %_ZN4base8internal14CheckedNumericIlEmLIlEERS2_T_.exit.i.i
@@ -474,24 +469,19 @@ if.else.i.i.i.i.i:                                ; preds = %if.end.i
   %cmp26.i.i.i.i.i = icmp eq i32 %cond10.sink.i.i.i.i.i, 0
   %mul.i.i.i.i.i = mul nsw i64 %ts.val.i, 1000000
   %cond27.i.i.i.i.i = select i1 %cmp26.i.i.i.i.i, i64 %mul.i.i.i.i.i, i64 0
-  %1 = trunc i32 %cond10.sink.i.i.i.i.i to i8
   br label %_ZN4base8internal14CheckedNumericIlEmLIlEERS2_T_.exit.i.i
 
 _ZN4base8internal14CheckedNumericIlEmLIlEERS2_T_.exit.i.i: ; preds = %if.else.i.i.i.i.i, %if.end.i
-  %validity.0.i.i.i.i = phi i8 [ %1, %if.else.i.i.i.i.i ], [ 0, %if.end.i ]
+  %validity.0.i.i.i.i = phi i1 [ %cmp26.i.i.i.i.i, %if.else.i.i.i.i.i ], [ true, %if.end.i ]
   %retval.0.i.i.i.i.i = phi i64 [ %cond27.i.i.i.i.i, %if.else.i.i.i.i.i ], [ 0, %if.end.i ]
   %div.i.i = sdiv i64 %ts.val1.i, 1000
   %add.i.i.i.i.i = add i64 %retval.0.i.i.i.i.i, %div.i.i
   %xor.i.i.i.i.i = xor i64 %add.i.i.i.i.i, %retval.0.i.i.i.i.i
   %xor1.i.i.i.i.i = xor i64 %add.i.i.i.i.i, %div.i.i
   %and.i.i.i.i.i = and i64 %xor.i.i.i.i.i, %xor1.i.i.i.i.i
   %tobool.i.i.i.i.i.i = icmp sgt i64 %and.i.i.i.i.i, -1
-  %tobool.i7.i.i.i.i.i = icmp slt i64 %add.i.i.i.i.i, 0
-  %cond.i.i.i2.i.i = select i1 %tobool.i7.i.i.i.i.i, i8 2, i8 1
-  %storemerge.i.i.i.i.i = select i1 %tobool.i.i.i.i.i.i, i8 0, i8 %cond.i.i.i2.i.i
-  %or5.i.i.i.i = or i8 %storemerge.i.i.i.i.i, %validity.0.i.i.i.i
   call void @llvm.lifetime.start.p0(i64 408, ptr nonnull %ref.tmp2.i.i.i)
-  %cmp.i.i.i.i = icmp eq i8 %or5.i.i.i.i, 0
+  %cmp.i.i.i.i = and i1 %validity.0.i.i.i.i, %tobool.i.i.i.i.i.i
   br i1 %cmp.i.i.i.i, label %_ZN12_GLOBAL__N_123ConvertTimespecToMicrosERK8timespec.exit.i, label %cond.false.i.i.i
 
 cond.false.i.i.i:                                 ; preds = %_ZN4base8internal14CheckedNumericIlEmLIlEERS2_T_.exit.i.i

bench/linux/optimized/intel_display_power_well.ll

@@ -4905,9 +4905,9 @@ define internal fastcc void @hsw_wait_for_power_well_disable(ptr noundef %0, ptr
   %31 = icmp eq i32 %30, 0
   br i1 %31, label %.thread2, label %.lr.ph
 
-.lr.ph:                                           ; preds = %2, %67
-  %.pn = phi i64 [ %71, %67 ], [ %26, %2 ]
-  %32 = phi i64 [ %70, %67 ], [ 10, %2 ]
+.lr.ph:                                           ; preds = %2, %65
+  %.pn = phi i64 [ %69, %65 ], [ %26, %2 ]
+  %32 = phi i64 [ %68, %65 ], [ 10, %2 ]
   %33 = icmp sgt i64 %.pn, %16
   %34 = load i32, ptr %5, align 4
   %35 = load ptr, ptr %20, align 8
@@ -4941,38 +4941,39 @@ define internal fastcc void @hsw_wait_for_power_well_disable(ptr noundef %0, ptr
   %59 = load ptr, ptr %20, align 8
   %60 = tail call i32 %59(ptr noundef %19, i32 %58, i1 noundef zeroext true) #9
   %61 = and i32 %60, %23
-  %62 = icmp eq i32 %61, 0
-  %63 = select i1 %62, i32 0, i32 8
-  %64 = or i32 %63, %57
-  %65 = icmp ne i32 %64, 0
-  %66 = select i1 %65, i1 true, i1 %33
-  br i1 %66, label %77, label %67
-
-67:                                               ; preds = %56
-  %68 = shl i64 %32, 1
-  tail call void @usleep_range_state(i64 noundef %32, i64 noundef %68, i32 noundef 2) #9
-  %69 = icmp slt i64 %32, 1000
-  %70 = select i1 %69, i64 %68, i64 %32
-  %71 = tail call i64 @ktime_get_raw() #9
+  %62 = or i32 %61, %57
+  %63 = icmp ne i32 %62, 0
+  %64 = select i1 %63, i1 true, i1 %33
+  br i1 %64, label %75, label %65
+
+65:                                               ; preds = %56
+  %66 = shl i64 %32, 1
+  tail call void @usleep_range_state(i64 noundef %32, i64 noundef %66, i32 noundef 2) #9
+  %67 = icmp slt i64 %32, 1000
+  %68 = select i1 %67, i64 %66, i64 %32
+  %69 = tail call i64 @ktime_get_raw() #9
   tail call void asm sideeffect "", "~{memory},~{dirflag},~{fpsr},~{flags}"() #9, !srcloc !183
-  %72 = load i32, ptr %18, align 4
-  %73 = load ptr, ptr %20, align 8
-  %74 = tail call i32 %73(ptr noundef %19, i32 %72, i1 noundef zeroext true) #9
-  %75 = and i32 %74, %22
-  %76 = icmp eq i32 %75, 0
-  br i1 %76, label %.thread2, label %.lr.ph
-
-77:                                               ; preds = %56
+  %70 = load i32, ptr %18, align 4
+  %71 = load ptr, ptr %20, align 8
+  %72 = tail call i32 %71(ptr noundef %19, i32 %70, i1 noundef zeroext true) #9
+  %73 = and i32 %72, %22
+  %74 = icmp eq i32 %73, 0
+  br i1 %74, label %.thread2, label %.lr.ph
+
+75:                                               ; preds = %56
+  %.not.le = icmp eq i32 %61, 0
+  %76 = select i1 %.not.le, i32 0, i32 8
+  %77 = or i32 %76, %57
   %78 = icmp eq ptr %0, null
   br i1 %78, label %82, label %79
 
-79:                                               ; preds = %77
+79:                                               ; preds = %75
   %80 = getelementptr inbounds i8, ptr %0, i64 8
   %81 = load ptr, ptr %80, align 8
   br label %82
 
-82:                                               ; preds = %79, %77
-  %83 = phi ptr [ %81, %79 ], [ null, %77 ]
+82:                                               ; preds = %79, %75
+  %83 = phi ptr [ %81, %79 ], [ null, %75 ]
   %84 = load ptr, ptr %1, align 8
   %85 = getelementptr inbounds i8, ptr %84, i64 8
   %86 = load ptr, ptr %85, align 8
@@ -4985,11 +4986,11 @@ define internal fastcc void @hsw_wait_for_power_well_disable(ptr noundef %0, ptr
   %93 = lshr i32 %57, 1
   %94 = and i32 %93, 1
   %95 = lshr i32 %57, 2
-  %96 = lshr i32 %64, 3
+  %96 = lshr i32 %77, 3
   tail call void (ptr, ptr, i32, ptr, ...) @__drm_dev_dbg(ptr noundef null, ptr noundef %83, i32 noundef 2, ptr noundef nonnull @.str.55, ptr noundef %91, i32 noundef %92, i32 noundef %94, i32 noundef %95, i32 noundef %96) #9
   br label %.thread2
 
-.thread2:                                         ; preds = %67, %2, %82
+.thread2:                                         ; preds = %65, %2, %82
   ret void
 }