tested for bias changes

duguyue100 · Mar 30, 2018 · c91ccb0 · c91ccb0
1 parent 2bd931e
commit c91ccb0
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Showing 2 changed files with 20 additions and 15 deletions.
diff --git a/pyaer/dynapse.py b/pyaer/dynapse.py
@@ -146,6 +146,8 @@ def set_bias(self, bias_obj, clear_sram=False, setup_sram=False):
             True if set successful, False otherwise.
             TODO: make this flag check possible
         """
+        # stop data stream
+        self.data_stop()
         time.sleep(1)
         # DYNAPSE_CONFIG_MUX
         self.set_config(libcaer.DYNAPSE_CONFIG_MUX,
@@ -258,6 +260,8 @@ def set_bias(self, bias_obj, clear_sram=False, setup_sram=False):
 
         # Essential: wait for chip to be stable
         time.sleep(1)
+        # restart data stream
+        self.start_data_stream(send_default_config=False)
 
     def set_activity_bias(self, chip_id, bias_obj):
         """Set biases for each chip.
@@ -1468,4 +1472,5 @@ def get_event(self):
             libcaer.caerEventPacketContainerFree(packet_container)
             return (spike_events, num_spike_events)
         else:
+            print ("I'm getting None")
             return None
diff --git a/scripts/configs/dynapse_config.json b/scripts/configs/dynapse_config.json
@@ -16,14 +16,14 @@
     "c0_if_rfr_n_fine": 3,
     "c0_if_nmda_n_coarse": 7,
     "c0_if_nmda_n_fine": 0,
-    "c0_if_dc_p_coarse": 1,
+    "c0_if_dc_p_coarse": 7,
     "c0_if_dc_p_fine": 30,
     "c0_if_tau1_coarse": 7,
     "c0_if_tau1_fine": 5,
     "c0_if_tau2_coarse": 6,
     "c0_if_tau2_fine": 100,
-    "c0_if_thr_n_coarse": 7,
-    "c0_if_thr_n_fine": 0,
+    "c0_if_thr_n_coarse": 4,
+    "c0_if_thr_n_fine": 120,
     "c0_if_ahw_p_coarse": 7,
     "c0_if_ahw_p_fine": 0,
     "c0_if_ahtau_n_coarse": 7,
@@ -67,14 +67,14 @@
     "c1_if_rfr_n_fine": 3,
     "c1_if_nmda_n_coarse": 7,
     "c1_if_nmda_n_fine": 0,
-    "c1_if_dc_p_coarse": 1,
+    "c1_if_dc_p_coarse": 7,
     "c1_if_dc_p_fine": 30,
-    "c1_if_tau1_coarse": 7,
+    "c1_if_tau1_coarse": 0,
     "c1_if_tau1_fine": 5,
     "c1_if_tau2_coarse": 6,
     "c1_if_tau2_fine": 100,
-    "c1_if_thr_n_coarse": 7,
-    "c1_if_thr_n_fine": 0,
+    "c1_if_thr_n_coarse": 4,
+    "c1_if_thr_n_fine": 120,
     "c1_if_ahw_p_coarse": 7,
     "c1_if_ahw_p_fine": 0,
     "c1_if_ahtau_n_coarse": 7,
@@ -118,14 +118,14 @@
     "c2_if_rfr_n_fine": 3,
     "c2_if_nmda_n_coarse": 7,
     "c2_if_nmda_n_fine": 0,
-    "c2_if_dc_p_coarse": 1,
+    "c2_if_dc_p_coarse": 7,
     "c2_if_dc_p_fine": 30,
-    "c2_if_tau1_coarse": 7,
+    "c2_if_tau1_coarse": 0,
     "c2_if_tau1_fine": 5,
     "c2_if_tau2_coarse": 6,
     "c2_if_tau2_fine": 100,
-    "c2_if_thr_n_coarse": 7,
-    "c2_if_thr_n_fine": 0,
+    "c2_if_thr_n_coarse": 4,
+    "c2_if_thr_n_fine": 120,
     "c2_if_ahw_p_coarse": 7,
     "c2_if_ahw_p_fine": 0,
     "c2_if_ahtau_n_coarse": 7,
@@ -169,14 +169,14 @@
     "c3_if_rfr_n_fine": 3,
     "c3_if_nmda_n_coarse": 7,
     "c3_if_nmda_n_fine": 0,
-    "c3_if_dc_p_coarse": 1,
+    "c3_if_dc_p_coarse": 7,
     "c3_if_dc_p_fine": 30,
-    "c3_if_tau1_coarse": 7,
+    "c3_if_tau1_coarse": 0,
     "c3_if_tau1_fine": 5,
     "c3_if_tau2_coarse": 6,
     "c3_if_tau2_fine": 100,
-    "c3_if_thr_n_coarse": 7,
-    "c3_if_thr_n_fine": 0,
+    "c3_if_thr_n_coarse": 4,
+    "c3_if_thr_n_fine": 120,
     "c3_if_ahw_p_coarse": 7,
     "c3_if_ahw_p_fine": 0,
     "c3_if_ahtau_n_coarse": 7,