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openocd: target: changing the order of the JATG devices
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For Cyclone V SoC Development kit, the order of the JTAG devices is
inverted when using USB blaster to program the SoC, this is a fix,
so the user dont have to do it manually

Signed-off-by: Esteban Valverde <[email protected]>
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mevalver authored and stephanosio committed Jun 14, 2022
1 parent 72d96af commit 42b6471
Showing 1 changed file with 8 additions and 10 deletions.
18 changes: 8 additions & 10 deletions tcl/target/altera_fpgasoc.cfg
Original file line number Diff line number Diff line change
Expand Up @@ -7,16 +7,6 @@ if { [info exists CHIPNAME] } {
set _CHIPNAME fpgasoc
}

# CoreSight Debug Access Port
if { [info exists DAP_TAPID] } {
set _DAP_TAPID $DAP_TAPID
} else {
set _DAP_TAPID 0x4ba00477
}

jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x01 -irmask 0x0f \
-expected-id $_DAP_TAPID

# Subsidiary TAP: fpga
if { [info exists FPGA_TAPID] } {
set _FPGA_TAPID $FPGA_TAPID
Expand All @@ -25,7 +15,15 @@ if { [info exists FPGA_TAPID] } {
}
jtag newtap $_CHIPNAME.fpga tap -irlen 10 -ircapture 0x01 -irmask 0x3 -expected-id $_FPGA_TAPID

# CoreSight Debug Access Port
if { [info exists DAP_TAPID] } {
set _DAP_TAPID $DAP_TAPID
} else {
set _DAP_TAPID 0x4ba00477
}

jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x01 -irmask 0x0f \
-expected-id $_DAP_TAPID
#
# Cortex-A9 target
#
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