phy/ecp5rgmii.py: Add support for dynamic link speeds

liteeth/mac/core.py

@@ -103,7 +103,13 @@ def add_preamble(self):
                 self.pipeline.append(tx_preamble)
 
             def add_gap(self):
-                tx_gap = gap.LiteEthMACGap(phy_dw)
+                # Some Phy, ECP5 for example, have a clk enable signal to support
+                # dynamic link speeds.
+                # In the gap inserter we need to ensure this is enable holds for
+                # the gap counter. If not we would insert a gap that might be too
+                # short.
+                phy_tx_clk_en = getattr(phy, "tx_clk_en", None)
+                tx_gap = gap.LiteEthMACGap(phy_dw, clk_en = phy_tx_clk_en)
                 tx_gap = ClockDomainsRenamer("eth_tx")(tx_gap)
                 self.submodules += tx_gap
                 self.pipeline.append(tx_gap)

liteeth/mac/gap.py

@@ -13,7 +13,7 @@
 # MAC Gap ------------------------------------------------------------------------------------------
 
 class LiteEthMACGap(Module):
-    def __init__(self, dw):
+    def __init__(self, dw, clk_en=None):
         self.sink   = sink   = stream.Endpoint(eth_phy_description(dw))
         self.source = source = stream.Endpoint(eth_phy_description(dw))
 
@@ -30,9 +30,19 @@ def __init__(self, dw):
                 NextState("GAP")
             )
         )
-        fsm.act("GAP",
-            NextValue(counter, counter + 1),
-            If(counter == (gap-1),
-                NextState("COPY")
+        if clk_en is None:
+            fsm.act("GAP",
+                NextValue(counter, counter + 1),
+                If(counter == (gap-1),
+                    NextState("COPY")
+                )
+            )
+        else:
+            fsm.act("GAP",
+                If(clk_en,
+                    NextValue(counter, counter + 1),
+                    If(counter == (gap-1),
+                        NextState("COPY")
+                    )
+                ),
             )
-        )