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im2col spc bugs fixes
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TommiTerza committed Sep 16, 2024
1 parent f13b1d9 commit cec7445
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Showing 6 changed files with 18 additions and 33 deletions.
1 change: 0 additions & 1 deletion hw/ip/dma/rtl/dma_obiread_fsm.sv
Original file line number Diff line number Diff line change
Expand Up @@ -198,7 +198,6 @@ module dma_obiread_fsm
// Wait for start signal
if (dma_start == 1'b1) begin
dma_read_fsm_n_state = DMA_READ_FSM_ON;
fifo_flush = 1'b1;
end else begin
dma_read_fsm_n_state = DMA_READ_FSM_IDLE;
end
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10 changes: 9 additions & 1 deletion hw/ip_examples/im2col_spc/rtl/im2col_spc.sv
Original file line number Diff line number Diff line change
Expand Up @@ -407,6 +407,8 @@ module im2col_spc
dma_if_loaded = 1'b0;
dma_regintfc_start = 1'b0;
fifo_pop = 1'b0;
dma_wdata = '0;
dma_addr = '0;

unique case (dma_if_cu_load_d)
IDLE_IF_LOAD: begin
Expand Down Expand Up @@ -528,9 +530,15 @@ module im2col_spc
always_ff @(posedge clk_i, negedge rst_ni) begin : proc_ff_control_unit
if (!rst_ni) begin
dma_ch_free <= 1'b1;
dma_ch_first_write <= 1'b0;
end else begin
/* Set the dma_ch_free when im2col starts or when a transaction is finished */
if ((im2col_start == 1'b1) | (|(dma_ch_en_mask[core_v_mini_mcu_pkg::DMA_CH_NUM-1:0] & dma_done_i)) == 1'b1) begin
if (im2col_start == 1'b1) begin
dma_ch_first_write <= 1'b0;
dma_ch_free <= 1'b1;
end

if (|(dma_ch_en_mask[core_v_mini_mcu_pkg::DMA_CH_NUM-1:0] & dma_done_i) == 1'b1) begin
dma_ch_free <= 1'b1;
end

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Original file line number Diff line number Diff line change
Expand Up @@ -81,7 +81,7 @@ module im2col_spc_regintfc_controller
aopb_req_o.wstrb <= 4'b1111;
aopb_req_o.addr <= addr_i;
aopb_req_o.wdata <= wdata_i;
end else begin
end else if (im2col_status_q == DONE) begin
aopb_req_o.valid <= 1'b0;
end
end
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24 changes: 0 additions & 24 deletions scripts/verification/examples/plotter.py
Original file line number Diff line number Diff line change
Expand Up @@ -75,23 +75,14 @@ def read_data(file_path):
parsed_1ch_CPU = parse_data(ast.literal_eval("'"+im2col_cpu_array[0]+"'"))
parsed_1ch_DMA = parse_data(ast.literal_eval("'"+im2col_dma_2d_C_array[0]+"'"))
parsed_1ch_spc = parse_data(ast.literal_eval("'"+im2col_spc_array[0]+"'"))
parsed_2ch_spc = parse_data(ast.literal_eval("'"+im2col_spc_array[1]+"'"))
parsed_3ch_spc = parse_data(ast.literal_eval("'"+im2col_spc_array[2]+"'"))
parsed_4ch_spc = parse_data(ast.literal_eval("'"+im2col_spc_array[3]+"'"))

add_loop_size(parsed_1ch_CPU)
add_loop_size(parsed_1ch_DMA)
add_loop_size(parsed_1ch_spc)
add_loop_size(parsed_2ch_spc)
add_loop_size(parsed_3ch_spc)
add_loop_size(parsed_4ch_spc)

df_1ch_CPU = pd.DataFrame(parsed_1ch_CPU)
df_1ch_DMA = pd.DataFrame(parsed_1ch_DMA)
df_1ch_spc = pd.DataFrame(parsed_1ch_spc)
df_2ch_spc = pd.DataFrame(parsed_2ch_spc)
df_3ch_spc = pd.DataFrame(parsed_3ch_spc)
df_4ch_spc = pd.DataFrame(parsed_4ch_spc)

# Plot the data
plt.figure(0, figsize=(12, 8))
Expand All @@ -100,9 +91,6 @@ def read_data(file_path):
plt.scatter(df_1ch_CPU['loop_size'], df_1ch_CPU['cycles'], color='blue', label='1ch CPU', alpha=1)
plt.scatter(df_1ch_DMA['loop_size'], df_1ch_DMA['cycles'], color='red', label='1ch DMA', alpha=1)
plt.scatter(df_1ch_spc['loop_size'], df_1ch_spc['cycles'], color='green', label='1ch SPC', alpha=1)
plt.scatter(df_2ch_spc['loop_size'], df_2ch_spc['cycles'], color='orange', label='2ch SPC', alpha=1)
plt.scatter(df_3ch_spc['loop_size'], df_3ch_spc['cycles'], color='purple', label='3ch SPC', alpha=1)
plt.scatter(df_4ch_spc['loop_size'], df_4ch_spc['cycles'], color='cyan', label='4ch SPC', alpha=1)

# Trendline plots
p_cpu = np.polyfit(df_1ch_CPU['loop_size'],df_1ch_CPU['cycles'], 1)
Expand All @@ -114,21 +102,9 @@ def read_data(file_path):
p_spc = np.polyfit(df_1ch_spc['loop_size'], df_1ch_spc['cycles'], 1)
trendline_spc = np.polyval(p_spc, df_1ch_spc['loop_size'])

p_2ch_spc = np.polyfit(df_2ch_spc['loop_size'], df_2ch_spc['cycles'], 1)
trendline_spc_2ch = np.polyval(p_2ch_spc, df_2ch_spc['loop_size'])

p_3ch_spc = np.polyfit(df_3ch_spc['loop_size'], df_3ch_spc['cycles'], 1)
trendline_spc_3ch = np.polyval(p_3ch_spc, df_3ch_spc['loop_size'])

p_4ch_spc = np.polyfit(df_4ch_spc['loop_size'], df_4ch_spc['cycles'], 1)
trendline_spc_4ch = np.polyval(p_4ch_spc, df_4ch_spc['loop_size'])

plt.plot(df_1ch_CPU['loop_size'], trendline_cpu, color='blue', linestyle='-', alpha=0.6)
plt.plot(df_1ch_DMA['loop_size'], trendline_dma, color='red', linestyle='-', alpha=0.6)
plt.plot(df_1ch_spc['loop_size'], trendline_spc, color='green', linestyle='-', alpha=0.6)
plt.plot(df_2ch_spc['loop_size'], trendline_spc_2ch, color='orange', linestyle='-', alpha=0.6)
plt.plot(df_3ch_spc['loop_size'], trendline_spc_3ch, color='purple', linestyle='-', alpha=0.6)
plt.plot(df_4ch_spc['loop_size'], trendline_spc_4ch, color='cyan', linestyle='-', alpha=0.6)


# Title and labels
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10 changes: 6 additions & 4 deletions sw/applications/example_im2col/im2col_lib.c
Original file line number Diff line number Diff line change
Expand Up @@ -160,18 +160,18 @@ int im2col_nchw_int32(uint8_t test_id, unsigned int *cycles)

dma_config_flags_t res;

dma_target_t tgt_src = {
static dma_target_t tgt_src = {
.ptr = input_image_nchw,
.inc_d1_du = STRIDE_D1,
.type = DMA_DATA_TYPE_WORD
};
dma_target_t tgt_dst = {
.ptr = output_data_ptr,

static dma_target_t tgt_dst = {
.inc_d1_du = 1,
.inc_d2_du = 1
};

dma_trans_t trans = {
static dma_trans_t trans = {
.src = &tgt_src,
.dst = &tgt_dst,
.mode = DMA_TRANS_MODE_SINGLE,
Expand Down Expand Up @@ -391,6 +391,8 @@ int im2col_nchw_int32(uint8_t test_id, unsigned int *cycles)
uint32_t* input_image_ptr = &input_image_nchw[0];
uint32_t* output_data_ptr = &output_data[0];

dma_init(0);

#if TIMING
CSR_SET_BITS(CSR_REG_MCOUNTINHIBIT, 0x1);
CSR_WRITE(CSR_REG_MCYCLE, 0);
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4 changes: 2 additions & 2 deletions sw/applications/example_im2col/im2col_lib.h
Original file line number Diff line number Diff line change
Expand Up @@ -104,9 +104,9 @@
#define OW_NHWC (FW * FH * CH * BATCH)
#define OH_NHWC (N_PATCHES_W) * (N_PATCHES_H)

#define START_ID 0
#define START_ID 1

#define TEST_EN 1
#define TEST_EN 0

// Computations for 2D DMA
#define SRC_INC_D2 (STRIDE_D2 * IW - (FW - 1 + (STRIDE_D1 - 1) * (FW - 1)))
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