[hw/sw] update flash load linker script, data_interleaved and data_flash_only sections

hw/ip/boot_rom/README.md

@@ -1,33 +1,5 @@
 ## boot_rom
 
-1. If you haven't done it yet, install [Conda](https://phoenixnap.com/kb/how-to-install-anaconda-ubuntu-18-04-or-20-04) as described in the link,
-and create the Conda enviroment with python 2.7:
-
-```bash
-conda update conda
-conda env create -f environment.yml
-```
-
-Activate the environment with
-
-```bash
-conda activate boot_rom
-```
-
-If you are already in the core-v-mini-mcu conda env, deactivate it first:
-
-```bash
-conda deactivate
-```
-
-2. Install the required Python tools:
-
-```
-pip install --user -r python-requirements.txt
-```
-
-3. Generate the boot_rom:
-
 If you modified the `boot_rom.S` file, generate it as:
 
 ```

hw/ip/boot_rom/boot_rom.S

@@ -99,7 +99,7 @@ _wait_spi_ready_tx_init:
 _wait_spi_ready_read_prog:
        lw     a5, SPI_HOST_STATUS_REG_OFFSET(a1)
        bgez   a5, _wait_spi_ready_read_prog
-       li     a3, 1024 # 1KB copy size
+       li     a3, 4096 # 4KB copy size
        li     s1, 0 # dst ptr (ram)
 
        // For loop until the 1KB copy from flash to ram is done

hw/ip/boot_rom/boot_rom.dump

@@ -6,14 +6,14 @@ Disassembly of section .text:
 
 00000000 <entry>:
    0:	200405b7          	lui	a1,0x20040
-   4:	0005c503          	lbu	a0,0(a1) # 20040000 <_end+0x2003ff16>
+   4:	0005c503          	lbu	a0,0(a1) # 20040000 <_end+0x2003ff18>
    8:	c119                	beqz	a0,e <boot>
    a:	41c8                	lw	a0,4(a1)
    c:	9502                	jalr	a0
 
 0000000e <boot>:
    e:	200005b7          	lui	a1,0x20000
-  12:	0085c503          	lbu	a0,8(a1) # 20000008 <_end+0x1fffff1e>
+  12:	0085c503          	lbu	a0,8(a1) # 20000008 <_end+0x1fffff20>
   16:	e511                	bnez	a0,22 <_jump_to_flash>
 
 00000018 <_jump_to_debug_rom>:
@@ -31,7 +31,7 @@ Disassembly of section .text:
   2c:	4505                	li	a0,1
   2e:	c188                	sw	a0,0(a1)
   30:	400005b7          	lui	a1,0x40000
-  34:	18058593          	addi	a1,a1,384 # 40000180 <_end+0x40000096>
+  34:	18058593          	addi	a1,a1,384 # 40000180 <_end+0x40000098>
   38:	9582                	jalr	a1
 
 0000003a <_copy_from_flash>:
@@ -73,41 +73,41 @@ Disassembly of section .text:
 0000008a <_wait_spi_ready_read_prog>:
   8a:	49dc                	lw	a5,20(a1)
   8c:	fe07dfe3          	bgez	a5,8a <_wait_spi_ready_read_prog>
-  90:	40000693          	li	a3,1024
-  94:	4481                	li	s1,0
-  96:	10000b13          	li	s6,256
-  9a:	09000437          	lui	s0,0x9000
-  9e:	0ff40a93          	addi	s5,s0,255 # 90000ff <_end+0x9000015>
-
-000000a2 <_32B_chunk_loop>:
-  a2:	00db4663          	blt	s6,a3,ae <_read_32B_chunk>
-  a6:	08000437          	lui	s0,0x8000
-  aa:	0ff40a93          	addi	s5,s0,255 # 80000ff <_end+0x8000015>
-
-000000ae <_read_32B_chunk>:
-  ae:	0355a223          	sw	s5,36(a1) # 20020024 <_end+0x2001ff3a>
-  b2:	0001                	nop
-
-000000b4 <_wait_spi_ready_read_32B_chunk>:
-  b4:	49dc                	lw	a5,20(a1)
-  b6:	fe07dfe3          	bgez	a5,b4 <_wait_spi_ready_read_32B_chunk>
-  ba:	10048b93          	addi	s7,s1,256
-
-000000be <_wait_spi_rxwm_8_words>:
-  be:	49dc                	lw	a5,20(a1)
-  c0:	83d1                	srli	a5,a5,0x14
-  c2:	8b85                	andi	a5,a5,1
-  c4:	dfed                	beqz	a5,be <_wait_spi_rxwm_8_words>
-  c6:	02048613          	addi	a2,s1,32
-
-000000ca <_spi_fifo_read_8_words>:
-  ca:	0285a883          	lw	a7,40(a1)
-  ce:	0114a023          	sw	a7,0(s1)
-  d2:	0491                	addi	s1,s1,4
-  d4:	fec49be3          	bne	s1,a2,ca <_spi_fifo_read_8_words>
-  d8:	ff7493e3          	bne	s1,s7,be <_wait_spi_rxwm_8_words>
-  dc:	f0068693          	addi	a3,a3,-256
-  e0:	f2e9                	bnez	a3,a2 <_32B_chunk_loop>
-  e2:	200005b7          	lui	a1,0x20000
-  e6:	4990                	lw	a2,16(a1)
-  e8:	9602                	jalr	a2
+  90:	6685                	lui	a3,0x1
+  92:	4481                	li	s1,0
+  94:	10000b13          	li	s6,256
+  98:	09000437          	lui	s0,0x9000
+  9c:	0ff40a93          	addi	s5,s0,255 # 90000ff <_end+0x9000017>
+
+000000a0 <_32B_chunk_loop>:
+  a0:	00db4663          	blt	s6,a3,ac <_read_32B_chunk>
+  a4:	08000437          	lui	s0,0x8000
+  a8:	0ff40a93          	addi	s5,s0,255 # 80000ff <_end+0x8000017>
+
+000000ac <_read_32B_chunk>:
+  ac:	0355a223          	sw	s5,36(a1) # 20020024 <_end+0x2001ff3c>
+  b0:	0001                	nop
+
+000000b2 <_wait_spi_ready_read_32B_chunk>:
+  b2:	49dc                	lw	a5,20(a1)
+  b4:	fe07dfe3          	bgez	a5,b2 <_wait_spi_ready_read_32B_chunk>
+  b8:	10048b93          	addi	s7,s1,256
+
+000000bc <_wait_spi_rxwm_8_words>:
+  bc:	49dc                	lw	a5,20(a1)
+  be:	83d1                	srli	a5,a5,0x14
+  c0:	8b85                	andi	a5,a5,1
+  c2:	dfed                	beqz	a5,bc <_wait_spi_rxwm_8_words>
+  c4:	02048613          	addi	a2,s1,32
+
+000000c8 <_spi_fifo_read_8_words>:
+  c8:	0285a883          	lw	a7,40(a1)
+  cc:	0114a023          	sw	a7,0(s1)
+  d0:	0491                	addi	s1,s1,4
+  d2:	fec49be3          	bne	s1,a2,c8 <_spi_fifo_read_8_words>
+  d6:	ff7493e3          	bne	s1,s7,bc <_wait_spi_rxwm_8_words>
+  da:	f0068693          	addi	a3,a3,-256 # f00 <_end+0xe18>
+  de:	f2e9                	bnez	a3,a0 <_32B_chunk_loop>
+  e0:	200005b7          	lui	a1,0x20000
+  e4:	4990                	lw	a2,16(a1)
+  e6:	9602                	jalr	a2

hw/ip/boot_rom/boot_rom.h

@@ -1,6 +1,6 @@
 // Auto-generated code
 
-const int reset_vec_size = 59;
+const int reset_vec_size = 58;
 
 uint32_t reset_vec[reset_vec_size] = {
     0x200405b7,
@@ -39,27 +39,26 @@ uint32_t reset_vec[reset_vec_size] = {
     0xd1d8070d,
     0x49dc0001,
     0xfe07dfe3,
-    0x40000693,
-    0x0b134481,
-    0x04371000,
-    0x0a930900,
-    0x46630ff4,
-    0x043700db,
-    0x0a930800,
-    0xa2230ff4,
-    0x00010355,
-    0xdfe349dc,
-    0x8b93fe07,
-    0x49dc1004,
-    0x8b8583d1,
-    0x8613dfed,
-    0xa8830204,
-    0xa0230285,
-    0x04910114,
-    0xfec49be3,
-    0xff7493e3,
-    0xf0068693,
-    0x05b7f2e9,
-    0x49902000,
-    0x00009602
+    0x44816685,
+    0x10000b13,
+    0x09000437,
+    0x0ff40a93,
+    0x00db4663,
+    0x08000437,
+    0x0ff40a93,
+    0x0355a223,
+    0x49dc0001,
+    0xfe07dfe3,
+    0x10048b93,
+    0x83d149dc,
+    0xdfed8b85,
+    0x02048613,
+    0x0285a883,
+    0x0114a023,
+    0x9be30491,
+    0x93e3fec4,
+    0x8693ff74,
+    0xf2e9f006,
+    0x200005b7,
+    0x96024990
 };

hw/ip/boot_rom/boot_rom.sv

@@ -22,33 +22,32 @@ module boot_rom
 );
   import core_v_mini_mcu_pkg::*;
 
-  localparam int unsigned RomSize = 59;
+  localparam int unsigned RomSize = 58;
 
   logic [RomSize-1:0][31:0] mem;
   assign mem = {
-    32'h00009602,
-    32'h49902000,
-    32'h05b7f2e9,
-    32'hf0068693,
-    32'hff7493e3,
-    32'hfec49be3,
-    32'h04910114,
-    32'ha0230285,
-    32'ha8830204,
-    32'h8613dfed,
-    32'h8b8583d1,
-    32'h49dc1004,
-    32'h8b93fe07,
-    32'hdfe349dc,
-    32'h00010355,
-    32'ha2230ff4,
-    32'h0a930800,
-    32'h043700db,
-    32'h46630ff4,
-    32'h0a930900,
-    32'h04371000,
-    32'h0b134481,
-    32'h40000693,
+    32'h96024990,
+    32'h200005b7,
+    32'hf2e9f006,
+    32'h8693ff74,
+    32'h93e3fec4,
+    32'h9be30491,
+    32'h0114a023,
+    32'h0285a883,
+    32'h02048613,
+    32'hdfed8b85,
+    32'h83d149dc,
+    32'h10048b93,
+    32'hfe07dfe3,
+    32'h49dc0001,
+    32'h0355a223,
+    32'h0ff40a93,
+    32'h08000437,
+    32'h00db4663,
+    32'h0ff40a93,
+    32'h09000437,
+    32'h10000b13,
+    32'h44816685,
     32'hfe07dfe3,
     32'h49dc0001,
     32'hd1d8070d,

hw/ip/boot_rom/gen_rom.py

@@ -89,9 +89,8 @@
 def read_bin():
 
     with open(filename + ".img", 'rb') as f:
-        rom = binascii.hexlify(f.read())
-        rom = map(''.join, zip(rom[::2], rom[1::2]))
-
+        rom = bytes.hex(f.read())
+        rom = list(map(''.join, zip(rom[::2], rom[1::2])))
 
     # align to 32 bit
     align = (int((len(rom) + 3) / 4 )) * 4;

sw/CMakeLists.txt

@@ -306,6 +306,7 @@ endif()
 set(COMPILER_LINKER_FLAGS "\
   -march=${CMAKE_SYSTEM_PROCESSOR} \
   -w -Os -g  -nostdlib  \
+  -ffunction-sections \
   -DHOST_BUILD \
   -D${CRT_TYPE} \
   -D${CRTO} \
@@ -401,7 +402,7 @@ endif()
 
 # Post processing command to create a disassembly file
 add_custom_command(TARGET ${MAINFILE}.elf POST_BUILD
-        COMMAND ${CMAKE_OBJDUMP} -S  ${MAINFILE}.elf > ${MAINFILE}.disasm
+        COMMAND ${CMAKE_OBJDUMP} -S  ${MAINFILE}.elf > ${MAINFILE}.S
         COMMENT "Invoking: Disassemble")
 
 # Post processing command to create a hex file

sw/applications/example_matadd_interleaved/main.c

@@ -0,0 +1,84 @@
+// Copyright 2022 OpenHW Group
+// Solderpad Hardware License, Version 2.1, see LICENSE.md for details.
+// SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1
+
+#include <stdio.h>
+#include <stdlib.h>
+#include "csr.h"
+#include "matrixAdd32.h"
+#include "x-heep.h"
+#include "core_v_mini_mcu.h"
+
+/* By default, printfs are activated for FPGA and disabled for simulation. */
+#define PRINTF_IN_FPGA  1
+#define PRINTF_IN_SIM   0
+
+#if TARGET_SIM && PRINTF_IN_SIM
+        #define PRINTF(fmt, ...)    printf(fmt, ## __VA_ARGS__)
+#elif TARGET_PYNQ_Z2 && PRINTF_IN_FPGA
+    #define PRINTF(fmt, ...)    printf(fmt, ## __VA_ARGS__)
+#else
+    #define PRINTF(...)
+#endif
+
+void __attribute__ ((noinline)) matrixAdd(int32_t * A, int32_t * B, int32_t * C, int N, int M);
+uint32_t check_results(int32_t *  C, int N, int M);
+
+int32_t __attribute__((section(".xheep_data_interleaved"))) m_c[16*16];
+
+
+int main()
+{
+
+#ifndef HAS_MEMORY_BANKS_IL
+    PRINTF("This application is only meant to be tested when there are interleaved memory banks\n");
+    return EXIT_SUCCESS;
+#endif
+
+
+    int N = WIDTH;
+    int M = HEIGHT;
+    uint32_t errors = 0;
+    unsigned int instr, cycles, ldstall, jrstall, imstall;
+
+    CSR_WRITE(CSR_REG_MCYCLE, 0);
+
+    //execute the kernel
+    matrixAdd(m_a, m_b, m_c, N, M);
+
+    CSR_READ(CSR_REG_MCYCLE, &cycles) ;
+
+    //stop the HW counter used for monitoring
+
+    errors = check_results(m_c, N, M);
+
+    PRINTF("program finished with %d errors and %d cycles\n\r", errors, cycles);
+    return errors;
+}
+
+void __attribute__ ((noinline)) matrixAdd(int32_t *  A, int32_t *  B, int32_t *  C, int N, int M)
+{
+    for(int i = 0; i < N; i++) {
+        for(int j = 0; j < M; j++) {
+            C[i*N+j] = A[i*WIDTH+j] + B[i*WIDTH+j];
+        }
+    }
+}
+
+uint32_t check_results(int32_t * C, int N, int M)
+{
+    // check
+    int i, j;
+    uint32_t err = 0;
+
+    for(i = 0; i < N; i++) {
+        for(j = 0; j < M; j++) {
+            if(C[i*N+j] != m_exp[i*WIDTH+j]) {
+                err++;
+                PRINTF("Error at index %d, %d, expected %d, got %d\n\r", i, j, m_exp[i*WIDTH+j], C[i*N+j]);
+            }
+        }
+    }
+
+    return err;
+}