Major commit includding Makefile doc automatisation, CMake, and FreeR…

…TOS porting

1. Makefile doc automatisation
2. CMake
3. FreeRTOS porting (new linker tpl, new vectors.S)

.gitignore

@@ -7,6 +7,7 @@ build/
 *.dis
 *.map
 *.do
+.venv/*
 
 # ignore apps output file
 run_verif_rtl_log.txt

Makefile

@@ -2,21 +2,41 @@
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
+MAKE                       = make
+
+# Get the absolute path
+mkfile_path := $(shell dirname "$(realpath $(firstword $(MAKEFILE_LIST)))")
+
+# Include the self-documenting tool
+FILE=$(mkfile_path)/Makefile
+include $(mkfile_path)/util/generate-makefile-help
+
 # Setup to autogenerate python virtual environment
 VENVDIR?=$(WORKDIR)/.venv
 REQUIREMENTS_TXT?=$(wildcard python-requirements.txt)
 include Makefile.venv
 
+# FUSESOC and Python values (default)
 FUSESOC = $(VENV)/fusesoc
-PYTHON = $(VENV)/python
+PYTHON  = $(VENV)/python
 
-# Makefile to generates core-v-mini-mcu files and build the design with fusesoc
+# Project options are based on the app to be build (default - hello_world)
+PROJECT  ?= hello_world
 
-.PHONY: clean help
+# Mainfile options are based on the main file to be build (default - hello_world)
+MAINFILE ?= hello_world
 
+# Linker options are 'on_chip' (default),'flash_load','flash_exec','freertos'
+LINKER   ?= on_chip
+
+# Target options are 'sim' (default) and 'pynq-z2'
 TARGET ?= sim
 
-# Generates mcu files
+## @section Installation
+
+## Generates mcu files core-v-mini-mcu files and build the design with fusesoc
+## @param CPU=[cv32e20(default),cv32e40p]
+## @param BUS=[onetoM(default),NtoM]
 mcu-gen: |venv
 	$(PYTHON) util/mcu_gen.py --cfg mcu_cfg.hjson --outdir hw/core-v-mini-mcu/include --cpu $(CPU) --bus $(BUS) --memorybanks $(MEMORY_BANKS) --external_domains $(EXTERNAL_DOMAINS) --pkg-sv hw/core-v-mini-mcu/include/core_v_mini_mcu_pkg.sv.tpl
 	$(PYTHON) util/mcu_gen.py --cfg mcu_cfg.hjson --outdir hw/core-v-mini-mcu/ --memorybanks $(MEMORY_BANKS) --tpl-sv hw/core-v-mini-mcu/system_bus.sv.tpl
@@ -36,107 +56,92 @@ mcu-gen: |venv
 	bash -c "cd hw/system/pad_control; source pad_control_gen.sh; cd ../../../"
 	$(PYTHON) util/mcu_gen.py --cfg mcu_cfg.hjson --outdir sw/linker --memorybanks $(MEMORY_BANKS) --linker_script sw/linker/link_flash_exec.ld.tpl
 	$(PYTHON) util/mcu_gen.py --cfg mcu_cfg.hjson --outdir sw/linker --memorybanks $(MEMORY_BANKS) --linker_script sw/linker/link_flash_load.ld.tpl
+	$(PYTHON) util/mcu_gen.py --cfg mcu_cfg.hjson --outdir sw/linker --memorybanks $(MEMORY_BANKS) --linker_script sw/linker/link_freertos.ld.tpl
 	$(MAKE) verible
 
-# Display mcu_gen.py help
+## Display mcu_gen.py help
 mcu-gen-help: |venv
 	$(PYTHON) util/mcu_gen.py -h
 
-# Runs verible formating
+## Runs verible formating
 verible:
 	util/format-verible;
-
-app-helloworld:
-	$(MAKE) -C sw PROJECT=hello_world MAINFILE=hello_world  TARGET=$(TARGET)
 
-app-clean:
-	$(MAKE) -C sw/build clean
-
-app-matadd:
-	$(MAKE) -C sw applications/matadd/matadd.hex TARGET=$(TARGET)
-
-app-ext-periph:
-	$(MAKE) -C sw applications/example_external_peripheral/example_external_peripheral.hex TARGET=$(TARGET)
-
-app-gpio-cnt:
-	$(MAKE) -C sw applications/example_gpio_cnt/example_gpio_cnt.hex TARGET=$(TARGET)
+## @section APP FW Build
 
-app-dma:
-	$(MAKE) -C sw applications/dma_example/dma_example.hex TARGET=$(TARGET)
+## Generates the build folder in sw using CMake to build (compile and linking)
+## @param PROJECT=<folder_name_of_the_project_to_be_built>
+## @param MAINFILE=<main_file_name_of_the_project_to_be_built>
+## @param TARGET=sim(default),pynq-z2
+## @param LINKER=on_chip(default),flash_load,flash_exec,freertos
+app:
+	$(MAKE) -C sw PROJECT=$(PROJECT) MAINFILE=$(MAINFILE)  TARGET=$(TARGET) LINKER=$(LINKER)
 
-app-spi-host:
-	$(MAKE) -C sw applications/spi_host_example/spi_host_example.hex TARGET=$(TARGET)
+## @section Simulation
 
-app-spi-host-dma:
-	$(MAKE) -C sw applications/spi_host_dma_example/spi_host_dma_example.hex TARGET=$(TARGET)
-
-app-spi-flash-write: 
-	$(MAKE) -C sw applications/spi_flash_write/spi_flash_write.hex TARGET=$(TARGET)
-
-# Tools specific fusesoc call
-
-# Simulation
+## Verilator simulation
 verilator-sim: |venv
 	$(FUSESOC) --cores-root . run --no-export --target=sim --tool=verilator $(FUSESOC_FLAGS) --setup --build openhwgroup.org:systems:core-v-mini-mcu 2>&1 | tee buildsim.log
 
+## Questasim simulation
 questasim-sim: |venv
 	$(FUSESOC) --cores-root . run --no-export --target=sim --tool=modelsim $(FUSESOC_FLAGS) --setup --build openhwgroup.org:systems:core-v-mini-mcu 2>&1 | tee buildsim.log
 
+## Questasim simulation with HDL optimized compilation
 questasim-sim-opt: questasim-sim
 	$(MAKE) -C build/openhwgroup.org_systems_core-v-mini-mcu_0/sim-modelsim opt
 
+## Questasim simulation with HDL optimized compilation and UPF power domain description
+## @param FUSESOC_FLAGS="--flag=use_upf"
 questasim-sim-opt-upf: questasim-sim
 	$(MAKE) -C build/openhwgroup.org_systems_core-v-mini-mcu_0/sim-modelsim opt-upf
 
+## Verilator simulation
+## @param CPU=cv32e20(default),cv32e40p
+## @param BUS=onetoM(default),NtoM
 vcs-sim: |venv
 	$(FUSESOC) --cores-root . run --no-export --target=sim --tool=vcs $(FUSESOC_FLAGS) --setup --build openhwgroup.org:systems:core-v-mini-mcu 2>&1 | tee buildsim.log
-
-run-helloworld: mcu-gen verilator-sim app-helloworld |venv
+
+## Generates the build output for helloworld applications
+## Uses verilator to simulate the HW model and run the FW
+## UART Dumping in uart0.log to show recollected results
+run-helloworld: mcu-gen verilator-sim |venv
+	$(MAKE) -C sw PROJECT=$(PROJECT) MAINFILE=$(MAINFILE)  TARGET=$(TARGET) LINKER=$(LINKER)\
 	cd ./build/openhwgroup.org_systems_core-v-mini-mcu_0/sim-verilator; \
-	./Vtestharness +firmware=../../../sw/applications/hello_world/hello_world.hex; \
+	./Vtestharness +firmware=../../../sw/build/hello_world.hex; \
 	cat uart0.log; \
 	cd ../../..;
 
-# Emulation
+## @section Vivado
+
+## Builds (synthesis and implementation) the bitstream for the FPGA version using Vivado
+## @param FPGA_BOARD=nexys-a7-100t,pynq-z2
+## @param FUSESOC_FLAGS=--flag=<flagname>
 vivado-fpga: |venv
 	$(FUSESOC) --cores-root . run --no-export --target=$(FPGA_BOARD) $(FUSESOC_FLAGS) --setup --build openhwgroup.org:systems:core-v-mini-mcu 2>&1 | tee buildvivado.log
 
 vivado-fpga-nobuild: |venv
 	$(FUSESOC) --cores-root . run --no-export --target=$(FPGA_BOARD) $(FUSESOC_FLAGS) --setup openhwgroup.org:systems:core-v-mini-mcu 2>&1 | tee buildvivado.log
 
-# ASIC
+## @section ASIC
+## Note that for this step you need to provide technology-dependent files (e.g., libs, constraints)
 asic: |venv
 	$(FUSESOC) --cores-root . run --no-export --target=asic_synthesis --setup --build openhwgroup.org:systems:core-v-mini-mcu 2>&1 | tee buildsim.log
 
-help:
-	@echo "SIMULATION BUILD TARGETS"
-	@echo "Build for simulation :"
-	@echo "\tmake [verilator,questasim,vcs]-sim"
-	@echo "\tex: make verilator-sim"
-	@echo "Change cpu and/or bus:"
-	@echo "\tmake <toolname>-sim CPU=[cv32e20(default),cv32e40p] BUS=[onetoM(default),NtoM]"
-	@echo "\tex: make verilator-sim CPU=cv32e40p BUS=NtoM)"
-	@echo "Add fusesoc flags:"
-	@echo "\tmake <toolname>-sim FUSESOC_FLAGS=\"--flag=<flagname0> --flag=<flagname1>\""
-	@echo "\tex: make verilator-sim FUSESOC_FLAGS=\"--flag=use_external_device_example --flag=use_jtag_dpi\""
-	@echo ""
-	@echo "FPGA EMULATION BUILD TARGET"
-	@echo "Build with vivado"
-	@echo "\tmake vivado-fpga[-nobuild] FPGA_BOARD=[nexys-a7-100t,pynq-z2] FUSESOC_FLAGS=--flag=<flagname>"
-	@echo "\tex: make vivado-fpga FPGA_BOARD=nexys-a7-100t FUSESOC_FLAGS=--flag=use_bscane_xilinx"
-	@echo ""
-	@echo "ASIC IMPLEMENTATION"
-	@echo "You need to provide technology-dependent files (e.g., libs, constraints)"
-	@echo "\tmake asic"
-	@echo "SOFTWARE BUILD TARGETS"
-	@echo "Build example applications:"
-	@echo "\tmake app-[helloworld,matadd,ext-periph,gpio-cnt]"
-	@echo "\tex: make app-helloworld"
-
-clean: clean-app clean-sim
 
+## @section Cleaning commands
+
+## Clean the CMake build folder
+app-clean:
+	$(MAKE) -C sw/build clean
+
+## Removes the CMake build folder
+app-restore:
+	rm -rf sw/build
+
+## Removes the HW build folder
 clean-sim:
 	@rm -rf build
 
-clean-app:
-	$(MAKE) -C sw clean
+## Removes the CMake build folder and the HW build folder
+clean: app-restore clean-sim

sw/CMakeLists.txt

@@ -1,5 +1,22 @@
-
-cmake_minimum_required(VERSION 3.10)
+# Copyright 2022 Jose Miranda
+#
+# Permission to use, copy, modify, and/or distribute this software for any
+# purpose with or without fee is hereby granted, provided that the above
+# copyright notice and this permission notice appear in all copies.
+#
+# THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES WITH
+# REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY
+# AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT,
+# INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM
+# LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
+# OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+# PERFORMANCE OF THIS SOFTWARE.
+
+# Author: Jose Miranda (jose.mirandacalero@epfl.ch)
+
+cmake_minimum_required(VERSION 3.15)
+
+include(FetchContent)
 
 if(NOT WIN32)
   string(ASCII 27 Esc)
@@ -22,23 +39,44 @@ if(NOT WIN32)
 endif()
 
 # set the project name
-project(${PROJECT})
+project(${PROJECT} ASM C)
 
 set(CMAKE_CXX_STANDARD 14)
 
+# Set MAIN file
+SET(TARGET ${MAINFILE})
+
+# Get the correct path for the crt files and linker file
+if (${LINKER} STREQUAL "on_chip")
+  SET(LIB_CRT_P "${ROOT_PROJECT}device/lib/crt/")
+  SET(LINK_FILE "link.ld")
+elseif(${LINKER} STREQUAL "flash_load")
+  SET(LIB_CRT_P "${ROOT_PROJECT}device/lib/crt_flash_load/")
+  SET(LINK_FILE "link_flash_load.ld")
+elseif(${LINKER} STREQUAL "flash_exec")
+  SET(LIB_CRT_P	"${ROOT_PROJECT}device/lib/crt_flash_exec/")
+  SET(LINK_FILE "link_flash_exec.ld")
+elseif(${LINKER} STREQUAL "freertos")
+  SET(LIB_CRT_P	"${ROOT_PROJECT}device/lib/crt_freertos/")
+  SET(LINK_FILE	"link_freertos.ld")
+else()
+  message( FATAL_ERROR "Linker specification is not correct" )
+endif()
+
 # messages to check the paths
 message( "${Magenta}Current project: ${PROJECT}${ColourReset}")
-message( "${Magenta}LIB_CRT PATH for Cmake: ${LIB_CRT}${ColourReset}")
+message( "${Magenta}Root project: ${ROOT_PROJECT}${ColourReset}")
+message( "${Magenta}LIB_CRT PATH for Cmake: ${LIB_CRT_P}${ColourReset}")
+message( "${Magenta}LINKER File for Cmake: ${LINK_FILE}${ColourReset}")
 message( "${Magenta}LIB_DRIVERS PATH for Cmake: ${LIB_DRIVERS}${ColourReset}")
 message( "${Magenta}Targetting main file: ${MAINFILE}${ColourReset}")
 message( "${Magenta}Targetting folder: ${INC_FOLDERS}${ColourReset}")
 
-#set MAIN file
-SET(TARGET ${MAINFILE})
-
+# Get all the folders to include when linking
 SET(INCLUDE_FOLDERS "-I ${RISCV}/riscv32-unknown-elf/include \
                      -I ${RISCV}/riscv32-unknown-elf/include/ \
                      -I ${ROOT_PROJECT} \
+					 -I ${ROOT_PROJECT}freertos/ \
                      -I ${ROOT_PROJECT}applications/${PROJECT}/ \
                      -I ${INC_FOLDERS} \
                      -I ${LIB_BASE} \
@@ -58,9 +96,34 @@ SET(INCLUDE_FOLDERS "-I ${RISCV}/riscv32-unknown-elf/include \
                      -I ${LIB_DRIVERS}uart/ \
                      ")
 
-SET(LINKED_FILES    "${ROOT_PROJECT}applications/${PROJECT}/test_cpp.cpp \
-                     ${LIB_CRT}crt0.S \
-                     ${LIB_CRT}vectors.S \
+# Include all those directories for compiling 
+include_directories(${TARGET}.elf 
+${RISCV}/riscv32-unknown-elf/include
+${RISCV}/riscv32-unknown-elf/include/
+${ROOT_PROJECT}
+${ROOT_PROJECT}freertos/
+${ROOT_PROJECT}applications/${PROJECT}/
+${INC_FOLDERS}
+${LIB_BASE}
+${LIB_BASE_FREESTD}
+${LIB_RUNTIME}
+${LIB_DRIVERS}dma/
+${LIB_DRIVERS}fast_intr_ctrl/
+${LIB_DRIVERS}gpio/
+${LIB_DRIVERS}i2c/
+${LIB_DRIVERS}pad_control/
+${LIB_DRIVERS}power_manager/
+${LIB_DRIVERS}rv_plic/
+${LIB_DRIVERS}rv_timer/
+${LIB_DRIVERS}soc_ctrl/
+${LIB_DRIVERS}spi_host/
+${LIB_DRIVERS}spi_memio/
+${LIB_DRIVERS}uart/
+)
+
+# Get all the files to include when linking
+SET(LINKED_FILES    "${LIB_CRT_P}crt0.S \
+                     ${LIB_CRT_P}vectors.S \
                      ${LIB_RUNTIME}handler.c \
                      ${LIB_RUNTIME}init.c \
                      ${LIB_RUNTIME}syscalls.c \
@@ -79,12 +142,46 @@ SET(LINKED_FILES    "${ROOT_PROJECT}applications/${PROJECT}/test_cpp.cpp \
                      ${LIB_DRIVERS}spi_host/spi_host.c \
                      ${LIB_DRIVERS}pad_control/pad_control.c \
                      ")
+
+# fetch content from freertos kernel repository			 
+FetchContent_Declare( freertos_kernel
+  GIT_REPOSITORY https://github.com/FreeRTOS/FreeRTOS-Kernel.git
+  GIT_TAG        99d3d54ac4d17474a81c94ec5bab36f55f470359 #V10.5.1, last commit 16/12/2022
+)
+
+# set the freertos version
+set(freertos_version "V10.5.1")
+add_library(freertos_config  INTERFACE)
+
+# set include dirtectories for freertos
+target_include_directories(freertos_config SYSTEM
+INTERFACE
+    ${ROOT_PROJECT}freertos/
+	${LIB_RUNTIME}
+    ${INC_FOLDERS}
+	${LIB_DRIVERS}rv_timer/
+	${LIB_BASE}
+)
+
+# set main compilation options for freertos
+target_compile_definitions(freertos_config
+  INTERFACE
+    projCOVERAGE_TEST=0
+)
+set(FREERTOS_HEAP "4" CACHE STRING "" FORCE)
+set(FREERTOS_PORT "GCC_RISC_V" CACHE STRING "" FORCE)
+
+# fetching freertos content
+if(${LINK_FILE} STREQUAL "link_freertos.ld")
+  FetchContent_MakeAvailable(freertos_kernel)
+endif()
 
 # specify the C standard
 set(CMAKE_C_FLAGS "\
   -march=${CMAKE_SYSTEM_PROCESSOR} \
   -w -Os -g  -nostdlib  \
   -DHOST_BUILD \
+  -DportasmHANDLE_INTERRUPT=vSystemIrqHandler\
 ")
 
 # In case of wanting to create a library with those subdirectories
@@ -101,9 +198,12 @@ add_executable(${TARGET}.elf ${SOURCES})
 #target_link_libraries(${TARGET}.elf base)
 #target_link_libraries(${TARGET}.elf drivers)
 #target_link_libraries(${TARGET}.elf runtime)
+if(${LINK_FILE} STREQUAL "link_freertos.ld")
+  target_link_libraries(${TARGET}.elf freertos_kernel)
+endif()
 
 # Setting-up the linker
-SET(LINKER_SCRIPT "${LINK_FOLDER}/link.ld")
+SET(LINKER_SCRIPT "${LINK_FOLDER}/${LINK_FILE}")
 message( "${Magenta}Linker file: ${LINKER_SCRIPT}${ColourReset}")
 
 # Setting-up the properties, elf is