Define known LP_I2C_ANA_MST parts

esp32c2/src/apb_ctrl/wifi_rst_en.rs

@@ -6,20 +6,20 @@ pub type W = crate::W<WIFI_RST_EN_SPEC>;
 pub type MAC_RST_R = crate::BitReader;
 #[doc = "Field `MAC_RST` writer - Set this bit to reset MAC module. Clear the bit to release MAC module."]
 pub type MAC_RST_W<'a, REG> = crate::BitWriter<'a, REG>;
-#[doc = "Field `BLE_RPA_RST` reader - Set this bit to reset MAC module. Clear the bit to release MAC module."]
+#[doc = "Field `BLE_RPA_RST` reader - Set this bit to reset BLE RPA module. Clear the bit to release BLE RPA module."]
 pub type BLE_RPA_RST_R = crate::BitReader;
-#[doc = "Field `BLE_RPA_RST` writer - Set this bit to reset MAC module. Clear the bit to release MAC module."]
+#[doc = "Field `BLE_RPA_RST` writer - Set this bit to reset BLE RPA module. Clear the bit to release BLE RPA module."]
 pub type BLE_RPA_RST_W<'a, REG> = crate::BitWriter<'a, REG>;
 impl R {
     #[doc = "Bit 2 - Set this bit to reset MAC module. Clear the bit to release MAC module."]
     #[inline(always)]
     pub fn mac_rst(&self) -> MAC_RST_R {
         MAC_RST_R::new(((self.bits >> 2) & 1) != 0)
     }
-    #[doc = "Bit 3 - Set this bit to reset MAC module. Clear the bit to release MAC module."]
+    #[doc = "Bit 27 - Set this bit to reset BLE RPA module. Clear the bit to release BLE RPA module."]
     #[inline(always)]
     pub fn ble_rpa_rst(&self) -> BLE_RPA_RST_R {
-        BLE_RPA_RST_R::new(((self.bits >> 3) & 1) != 0)
+        BLE_RPA_RST_R::new(((self.bits >> 27) & 1) != 0)
     }
 }
 #[cfg(feature = "impl-register-debug")]
@@ -37,10 +37,10 @@ impl W {
     pub fn mac_rst(&mut self) -> MAC_RST_W<WIFI_RST_EN_SPEC> {
         MAC_RST_W::new(self, 2)
     }
-    #[doc = "Bit 3 - Set this bit to reset MAC module. Clear the bit to release MAC module."]
+    #[doc = "Bit 27 - Set this bit to reset BLE RPA module. Clear the bit to release BLE RPA module."]
     #[inline(always)]
     pub fn ble_rpa_rst(&mut self) -> BLE_RPA_RST_W<WIFI_RST_EN_SPEC> {
-        BLE_RPA_RST_W::new(self, 3)
+        BLE_RPA_RST_W::new(self, 27)
     }
 }
 #[doc = "APB_CTRL_WIFI_RST_EN_REG\n\nYou can [`read`](crate::Reg::read) this register and get [`wifi_rst_en::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`wifi_rst_en::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]

esp32c2/src/lib.rs

@@ -1389,6 +1389,52 @@ impl core::fmt::Debug for XTS_AES {
 }
 #[doc = "XTS-AES-128 Flash Encryption"]
 pub mod xts_aes;
+#[doc = "LP_I2C_ANA_MST Peripheral"]
+pub struct LP_I2C_ANA_MST {
+    _marker: PhantomData<*const ()>,
+}
+unsafe impl Send for LP_I2C_ANA_MST {}
+impl LP_I2C_ANA_MST {
+    #[doc = r"Pointer to the register block"]
+    pub const PTR: *const lp_i2c_ana_mst::RegisterBlock = 0x6004_e840 as *const _;
+    #[doc = r"Return the pointer to the register block"]
+    #[inline(always)]
+    pub const fn ptr() -> *const lp_i2c_ana_mst::RegisterBlock {
+        Self::PTR
+    }
+    #[doc = r" Steal an instance of this peripheral"]
+    #[doc = r""]
+    #[doc = r" # Safety"]
+    #[doc = r""]
+    #[doc = r" Ensure that the new instance of the peripheral cannot be used in a way"]
+    #[doc = r" that may race with any existing instances, for example by only"]
+    #[doc = r" accessing read-only or write-only registers, or by consuming the"]
+    #[doc = r" original peripheral and using critical sections to coordinate"]
+    #[doc = r" access between multiple new instances."]
+    #[doc = r""]
+    #[doc = r" Additionally, other software such as HALs may rely on only one"]
+    #[doc = r" peripheral instance existing to ensure memory safety; ensure"]
+    #[doc = r" no stolen instances are passed to such software."]
+    pub unsafe fn steal() -> Self {
+        Self {
+            _marker: PhantomData,
+        }
+    }
+}
+impl Deref for LP_I2C_ANA_MST {
+    type Target = lp_i2c_ana_mst::RegisterBlock;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        unsafe { &*Self::PTR }
+    }
+}
+impl core::fmt::Debug for LP_I2C_ANA_MST {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("LP_I2C_ANA_MST").finish()
+    }
+}
+#[doc = "LP_I2C_ANA_MST Peripheral"]
+pub mod lp_i2c_ana_mst;
 #[no_mangle]
 static mut DEVICE_PERIPHERALS: bool = false;
 #[doc = r" All the peripherals."]
@@ -1448,6 +1494,8 @@ pub struct Peripherals {
     pub UART1: UART1,
     #[doc = "XTS_AES"]
     pub XTS_AES: XTS_AES,
+    #[doc = "LP_I2C_ANA_MST"]
+    pub LP_I2C_ANA_MST: LP_I2C_ANA_MST,
 }
 impl Peripherals {
     #[doc = r" Returns all the peripherals *once*."]
@@ -1497,6 +1545,7 @@ impl Peripherals {
             UART0: UART0::steal(),
             UART1: UART1::steal(),
             XTS_AES: XTS_AES::steal(),
+            LP_I2C_ANA_MST: LP_I2C_ANA_MST::steal(),
         }
     }
 }

esp32c2/src/lp_i2c_ana_mst.rs

@@ -0,0 +1,37 @@
+#[repr(C)]
+#[cfg_attr(feature = "impl-register-debug", derive(Debug))]
+#[doc = "Register block"]
+pub struct RegisterBlock {
+    i2c0_conf: I2C0_CONF,
+    ana_config: ANA_CONFIG,
+    ana_config2: ANA_CONFIG2,
+}
+impl RegisterBlock {
+    #[doc = "0x00 - I2C0_CONF register"]
+    #[inline(always)]
+    pub const fn i2c0_conf(&self) -> &I2C0_CONF {
+        &self.i2c0_conf
+    }
+    #[doc = "0x04 - ANA_CONFIG register"]
+    #[inline(always)]
+    pub const fn ana_config(&self) -> &ANA_CONFIG {
+        &self.ana_config
+    }
+    #[doc = "0x08 - ANA_CONFIG2 register"]
+    #[inline(always)]
+    pub const fn ana_config2(&self) -> &ANA_CONFIG2 {
+        &self.ana_config2
+    }
+}
+#[doc = "I2C0_CONF (rw) register accessor: I2C0_CONF register\n\nYou can [`read`](crate::Reg::read) this register and get [`i2c0_conf::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`i2c0_conf::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@i2c0_conf`] module"]
+pub type I2C0_CONF = crate::Reg<i2c0_conf::I2C0_CONF_SPEC>;
+#[doc = "I2C0_CONF register"]
+pub mod i2c0_conf;
+#[doc = "ANA_CONFIG (rw) register accessor: ANA_CONFIG register\n\nYou can [`read`](crate::Reg::read) this register and get [`ana_config::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ana_config::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ana_config`] module"]
+pub type ANA_CONFIG = crate::Reg<ana_config::ANA_CONFIG_SPEC>;
+#[doc = "ANA_CONFIG register"]
+pub mod ana_config;
+#[doc = "ANA_CONFIG2 (rw) register accessor: ANA_CONFIG2 register\n\nYou can [`read`](crate::Reg::read) this register and get [`ana_config2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ana_config2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ana_config2`] module"]
+pub type ANA_CONFIG2 = crate::Reg<ana_config2::ANA_CONFIG2_SPEC>;
+#[doc = "ANA_CONFIG2 register"]
+pub mod ana_config2;

esp32c2/src/lp_i2c_ana_mst/ana_config.rs

@@ -0,0 +1,77 @@
+#[doc = "Register `ANA_CONFIG` reader"]
+pub type R = crate::R<ANA_CONFIG_SPEC>;
+#[doc = "Register `ANA_CONFIG` writer"]
+pub type W = crate::W<ANA_CONFIG_SPEC>;
+#[doc = "Field `SAR_FORCE_PU` reader - ?"]
+pub type SAR_FORCE_PU_R = crate::BitReader;
+#[doc = "Field `SAR_FORCE_PU` writer - ?"]
+pub type SAR_FORCE_PU_W<'a, REG> = crate::BitWriter<'a, REG>;
+#[doc = "Field `BBPLL_PD` reader - Clear to enable BBPLL"]
+pub type BBPLL_PD_R = crate::BitReader;
+#[doc = "Field `BBPLL_PD` writer - Clear to enable BBPLL"]
+pub type BBPLL_PD_W<'a, REG> = crate::BitWriter<'a, REG>;
+#[doc = "Field `SAR_FORCE_PD` reader - ?"]
+pub type SAR_FORCE_PD_R = crate::BitReader;
+#[doc = "Field `SAR_FORCE_PD` writer - ?"]
+pub type SAR_FORCE_PD_W<'a, REG> = crate::BitWriter<'a, REG>;
+impl R {
+    #[doc = "Bit 16 - ?"]
+    #[inline(always)]
+    pub fn sar_force_pu(&self) -> SAR_FORCE_PU_R {
+        SAR_FORCE_PU_R::new(((self.bits >> 16) & 1) != 0)
+    }
+    #[doc = "Bit 17 - Clear to enable BBPLL"]
+    #[inline(always)]
+    pub fn bbpll_pd(&self) -> BBPLL_PD_R {
+        BBPLL_PD_R::new(((self.bits >> 17) & 1) != 0)
+    }
+    #[doc = "Bit 18 - ?"]
+    #[inline(always)]
+    pub fn sar_force_pd(&self) -> SAR_FORCE_PD_R {
+        SAR_FORCE_PD_R::new(((self.bits >> 18) & 1) != 0)
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("ANA_CONFIG")
+            .field("bbpll_pd", &self.bbpll_pd())
+            .field("sar_force_pd", &self.sar_force_pd())
+            .field("sar_force_pu", &self.sar_force_pu())
+            .finish()
+    }
+}
+impl W {
+    #[doc = "Bit 16 - ?"]
+    #[inline(always)]
+    pub fn sar_force_pu(&mut self) -> SAR_FORCE_PU_W<ANA_CONFIG_SPEC> {
+        SAR_FORCE_PU_W::new(self, 16)
+    }
+    #[doc = "Bit 17 - Clear to enable BBPLL"]
+    #[inline(always)]
+    pub fn bbpll_pd(&mut self) -> BBPLL_PD_W<ANA_CONFIG_SPEC> {
+        BBPLL_PD_W::new(self, 17)
+    }
+    #[doc = "Bit 18 - ?"]
+    #[inline(always)]
+    pub fn sar_force_pd(&mut self) -> SAR_FORCE_PD_W<ANA_CONFIG_SPEC> {
+        SAR_FORCE_PD_W::new(self, 18)
+    }
+}
+#[doc = "ANA_CONFIG register\n\nYou can [`read`](crate::Reg::read) this register and get [`ana_config::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ana_config::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct ANA_CONFIG_SPEC;
+impl crate::RegisterSpec for ANA_CONFIG_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`ana_config::R`](R) reader structure"]
+impl crate::Readable for ANA_CONFIG_SPEC {}
+#[doc = "`write(|w| ..)` method takes [`ana_config::W`](W) writer structure"]
+impl crate::Writable for ANA_CONFIG_SPEC {
+    type Safety = crate::Unsafe;
+    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
+    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
+}
+#[doc = "`reset()` method sets ANA_CONFIG to value 0"]
+impl crate::Resettable for ANA_CONFIG_SPEC {
+    const RESET_VALUE: u32 = 0;
+}

esp32c2/src/lp_i2c_ana_mst/ana_config2.rs

@@ -0,0 +1,62 @@
+#[doc = "Register `ANA_CONFIG2` reader"]
+pub type R = crate::R<ANA_CONFIG2_SPEC>;
+#[doc = "Register `ANA_CONFIG2` writer"]
+pub type W = crate::W<ANA_CONFIG2_SPEC>;
+#[doc = "Field `SAR_FORCE_PU` reader - ?"]
+pub type SAR_FORCE_PU_R = crate::BitReader;
+#[doc = "Field `SAR_FORCE_PU` writer - ?"]
+pub type SAR_FORCE_PU_W<'a, REG> = crate::BitWriter<'a, REG>;
+#[doc = "Field `SAR_FORCE_PD` reader - ?"]
+pub type SAR_FORCE_PD_R = crate::BitReader;
+#[doc = "Field `SAR_FORCE_PD` writer - ?"]
+pub type SAR_FORCE_PD_W<'a, REG> = crate::BitWriter<'a, REG>;
+impl R {
+    #[doc = "Bit 16 - ?"]
+    #[inline(always)]
+    pub fn sar_force_pu(&self) -> SAR_FORCE_PU_R {
+        SAR_FORCE_PU_R::new(((self.bits >> 16) & 1) != 0)
+    }
+    #[doc = "Bit 18 - ?"]
+    #[inline(always)]
+    pub fn sar_force_pd(&self) -> SAR_FORCE_PD_R {
+        SAR_FORCE_PD_R::new(((self.bits >> 18) & 1) != 0)
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("ANA_CONFIG2")
+            .field("sar_force_pd", &self.sar_force_pd())
+            .field("sar_force_pu", &self.sar_force_pu())
+            .finish()
+    }
+}
+impl W {
+    #[doc = "Bit 16 - ?"]
+    #[inline(always)]
+    pub fn sar_force_pu(&mut self) -> SAR_FORCE_PU_W<ANA_CONFIG2_SPEC> {
+        SAR_FORCE_PU_W::new(self, 16)
+    }
+    #[doc = "Bit 18 - ?"]
+    #[inline(always)]
+    pub fn sar_force_pd(&mut self) -> SAR_FORCE_PD_W<ANA_CONFIG2_SPEC> {
+        SAR_FORCE_PD_W::new(self, 18)
+    }
+}
+#[doc = "ANA_CONFIG2 register\n\nYou can [`read`](crate::Reg::read) this register and get [`ana_config2::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ana_config2::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct ANA_CONFIG2_SPEC;
+impl crate::RegisterSpec for ANA_CONFIG2_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`ana_config2::R`](R) reader structure"]
+impl crate::Readable for ANA_CONFIG2_SPEC {}
+#[doc = "`write(|w| ..)` method takes [`ana_config2::W`](W) writer structure"]
+impl crate::Writable for ANA_CONFIG2_SPEC {
+    type Safety = crate::Unsafe;
+    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
+    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
+}
+#[doc = "`reset()` method sets ANA_CONFIG2 to value 0"]
+impl crate::Resettable for ANA_CONFIG2_SPEC {
+    const RESET_VALUE: u32 = 0;
+}

esp32c2/src/lp_i2c_ana_mst/i2c0_conf.rs

@@ -0,0 +1,77 @@
+#[doc = "Register `I2C0_CONF` reader"]
+pub type R = crate::R<I2C0_CONF_SPEC>;
+#[doc = "Register `I2C0_CONF` writer"]
+pub type W = crate::W<I2C0_CONF_SPEC>;
+#[doc = "Field `BBPLL_STOP_FORCE_HIGH` reader - ?"]
+pub type BBPLL_STOP_FORCE_HIGH_R = crate::BitReader;
+#[doc = "Field `BBPLL_STOP_FORCE_HIGH` writer - ?"]
+pub type BBPLL_STOP_FORCE_HIGH_W<'a, REG> = crate::BitWriter<'a, REG>;
+#[doc = "Field `BBPLL_STOP_FORCE_LOW` reader - ?"]
+pub type BBPLL_STOP_FORCE_LOW_R = crate::BitReader;
+#[doc = "Field `BBPLL_STOP_FORCE_LOW` writer - ?"]
+pub type BBPLL_STOP_FORCE_LOW_W<'a, REG> = crate::BitWriter<'a, REG>;
+#[doc = "Field `BBPLL_CAL_DONE` reader - ?"]
+pub type BBPLL_CAL_DONE_R = crate::BitReader;
+#[doc = "Field `BBPLL_CAL_DONE` writer - ?"]
+pub type BBPLL_CAL_DONE_W<'a, REG> = crate::BitWriter<'a, REG>;
+impl R {
+    #[doc = "Bit 2 - ?"]
+    #[inline(always)]
+    pub fn bbpll_stop_force_high(&self) -> BBPLL_STOP_FORCE_HIGH_R {
+        BBPLL_STOP_FORCE_HIGH_R::new(((self.bits >> 2) & 1) != 0)
+    }
+    #[doc = "Bit 3 - ?"]
+    #[inline(always)]
+    pub fn bbpll_stop_force_low(&self) -> BBPLL_STOP_FORCE_LOW_R {
+        BBPLL_STOP_FORCE_LOW_R::new(((self.bits >> 3) & 1) != 0)
+    }
+    #[doc = "Bit 24 - ?"]
+    #[inline(always)]
+    pub fn bbpll_cal_done(&self) -> BBPLL_CAL_DONE_R {
+        BBPLL_CAL_DONE_R::new(((self.bits >> 24) & 1) != 0)
+    }
+}
+#[cfg(feature = "impl-register-debug")]
+impl core::fmt::Debug for R {
+    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
+        f.debug_struct("I2C0_CONF")
+            .field("bbpll_stop_force_high", &self.bbpll_stop_force_high())
+            .field("bbpll_stop_force_low", &self.bbpll_stop_force_low())
+            .field("bbpll_cal_done", &self.bbpll_cal_done())
+            .finish()
+    }
+}
+impl W {
+    #[doc = "Bit 2 - ?"]
+    #[inline(always)]
+    pub fn bbpll_stop_force_high(&mut self) -> BBPLL_STOP_FORCE_HIGH_W<I2C0_CONF_SPEC> {
+        BBPLL_STOP_FORCE_HIGH_W::new(self, 2)
+    }
+    #[doc = "Bit 3 - ?"]
+    #[inline(always)]
+    pub fn bbpll_stop_force_low(&mut self) -> BBPLL_STOP_FORCE_LOW_W<I2C0_CONF_SPEC> {
+        BBPLL_STOP_FORCE_LOW_W::new(self, 3)
+    }
+    #[doc = "Bit 24 - ?"]
+    #[inline(always)]
+    pub fn bbpll_cal_done(&mut self) -> BBPLL_CAL_DONE_W<I2C0_CONF_SPEC> {
+        BBPLL_CAL_DONE_W::new(self, 24)
+    }
+}
+#[doc = "I2C0_CONF register\n\nYou can [`read`](crate::Reg::read) this register and get [`i2c0_conf::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`i2c0_conf::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct I2C0_CONF_SPEC;
+impl crate::RegisterSpec for I2C0_CONF_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [`i2c0_conf::R`](R) reader structure"]
+impl crate::Readable for I2C0_CONF_SPEC {}
+#[doc = "`write(|w| ..)` method takes [`i2c0_conf::W`](W) writer structure"]
+impl crate::Writable for I2C0_CONF_SPEC {
+    type Safety = crate::Unsafe;
+    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
+    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
+}
+#[doc = "`reset()` method sets I2C0_CONF to value 0"]
+impl crate::Resettable for I2C0_CONF_SPEC {
+    const RESET_VALUE: u32 = 0;
+}