Patch the UART0 peripheral for ESP32-P4

esp32p4/src/uart0/at_cmd_char_sync.rs → esp32p4/src/uart0/at_cmd_char.rs

@@ -1,7 +1,7 @@
-#[doc = "Register `AT_CMD_CHAR_SYNC` reader"]
-pub type R = crate::R<AT_CMD_CHAR_SYNC_SPEC>;
-#[doc = "Register `AT_CMD_CHAR_SYNC` writer"]
-pub type W = crate::W<AT_CMD_CHAR_SYNC_SPEC>;
+#[doc = "Register `AT_CMD_CHAR` reader"]
+pub type R = crate::R<AT_CMD_CHAR_SPEC>;
+#[doc = "Register `AT_CMD_CHAR` writer"]
+pub type W = crate::W<AT_CMD_CHAR_SPEC>;
 #[doc = "Field `AT_CMD_CHAR` reader - This register is used to configure the content of at_cmd char."]
 pub type AT_CMD_CHAR_R = crate::FieldReader;
 #[doc = "Field `AT_CMD_CHAR` writer - This register is used to configure the content of at_cmd char."]
@@ -25,7 +25,7 @@ impl R {
 #[cfg(feature = "impl-register-debug")]
 impl core::fmt::Debug for R {
     fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
-        f.debug_struct("AT_CMD_CHAR_SYNC")
+        f.debug_struct("AT_CMD_CHAR")
             .field(
                 "at_cmd_char",
                 &format_args!("{}", self.at_cmd_char().bits()),
@@ -35,7 +35,7 @@ impl core::fmt::Debug for R {
     }
 }
 #[cfg(feature = "impl-register-debug")]
-impl core::fmt::Debug for crate::generic::Reg<AT_CMD_CHAR_SYNC_SPEC> {
+impl core::fmt::Debug for crate::generic::Reg<AT_CMD_CHAR_SPEC> {
     fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
         core::fmt::Debug::fmt(&self.read(), f)
     }
@@ -44,13 +44,13 @@ impl W {
     #[doc = "Bits 0:7 - This register is used to configure the content of at_cmd char."]
     #[inline(always)]
     #[must_use]
-    pub fn at_cmd_char(&mut self) -> AT_CMD_CHAR_W<AT_CMD_CHAR_SYNC_SPEC> {
+    pub fn at_cmd_char(&mut self) -> AT_CMD_CHAR_W<AT_CMD_CHAR_SPEC> {
         AT_CMD_CHAR_W::new(self, 0)
     }
     #[doc = "Bits 8:15 - This register is used to configure the num of continuous at_cmd chars received by receiver."]
     #[inline(always)]
     #[must_use]
-    pub fn char_num(&mut self) -> CHAR_NUM_W<AT_CMD_CHAR_SYNC_SPEC> {
+    pub fn char_num(&mut self) -> CHAR_NUM_W<AT_CMD_CHAR_SPEC> {
         CHAR_NUM_W::new(self, 8)
     }
     #[doc = r" Writes raw bits to the register."]
@@ -64,19 +64,19 @@ impl W {
         self
     }
 }
-#[doc = "AT escape sequence detection configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`at_cmd_char_sync::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`at_cmd_char_sync::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
-pub struct AT_CMD_CHAR_SYNC_SPEC;
-impl crate::RegisterSpec for AT_CMD_CHAR_SYNC_SPEC {
+#[doc = "AT escape sequence detection configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`at_cmd_char::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`at_cmd_char::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct AT_CMD_CHAR_SPEC;
+impl crate::RegisterSpec for AT_CMD_CHAR_SPEC {
     type Ux = u32;
 }
-#[doc = "`read()` method returns [`at_cmd_char_sync::R`](R) reader structure"]
-impl crate::Readable for AT_CMD_CHAR_SYNC_SPEC {}
-#[doc = "`write(|w| ..)` method takes [`at_cmd_char_sync::W`](W) writer structure"]
-impl crate::Writable for AT_CMD_CHAR_SYNC_SPEC {
+#[doc = "`read()` method returns [`at_cmd_char::R`](R) reader structure"]
+impl crate::Readable for AT_CMD_CHAR_SPEC {}
+#[doc = "`write(|w| ..)` method takes [`at_cmd_char::W`](W) writer structure"]
+impl crate::Writable for AT_CMD_CHAR_SPEC {
     const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
     const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
 }
-#[doc = "`reset()` method sets AT_CMD_CHAR_SYNC to value 0x032b"]
-impl crate::Resettable for AT_CMD_CHAR_SYNC_SPEC {
+#[doc = "`reset()` method sets AT_CMD_CHAR to value 0x032b"]
+impl crate::Resettable for AT_CMD_CHAR_SPEC {
     const RESET_VALUE: u32 = 0x032b;
 }

esp32p4/src/uart0/at_cmd_gaptout_sync.rs → esp32p4/src/uart0/at_cmd_gaptout.rs

@@ -1,7 +1,7 @@
-#[doc = "Register `AT_CMD_GAPTOUT_SYNC` reader"]
-pub type R = crate::R<AT_CMD_GAPTOUT_SYNC_SPEC>;
-#[doc = "Register `AT_CMD_GAPTOUT_SYNC` writer"]
-pub type W = crate::W<AT_CMD_GAPTOUT_SYNC_SPEC>;
+#[doc = "Register `AT_CMD_GAPTOUT` reader"]
+pub type R = crate::R<AT_CMD_GAPTOUT_SPEC>;
+#[doc = "Register `AT_CMD_GAPTOUT` writer"]
+pub type W = crate::W<AT_CMD_GAPTOUT_SPEC>;
 #[doc = "Field `RX_GAP_TOUT` reader - This register is used to configure the duration time between the at_cmd chars."]
 pub type RX_GAP_TOUT_R = crate::FieldReader<u16>;
 #[doc = "Field `RX_GAP_TOUT` writer - This register is used to configure the duration time between the at_cmd chars."]
@@ -16,7 +16,7 @@ impl R {
 #[cfg(feature = "impl-register-debug")]
 impl core::fmt::Debug for R {
     fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
-        f.debug_struct("AT_CMD_GAPTOUT_SYNC")
+        f.debug_struct("AT_CMD_GAPTOUT")
             .field(
                 "rx_gap_tout",
                 &format_args!("{}", self.rx_gap_tout().bits()),
@@ -25,7 +25,7 @@ impl core::fmt::Debug for R {
     }
 }
 #[cfg(feature = "impl-register-debug")]
-impl core::fmt::Debug for crate::generic::Reg<AT_CMD_GAPTOUT_SYNC_SPEC> {
+impl core::fmt::Debug for crate::generic::Reg<AT_CMD_GAPTOUT_SPEC> {
     fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
         core::fmt::Debug::fmt(&self.read(), f)
     }
@@ -34,7 +34,7 @@ impl W {
     #[doc = "Bits 0:15 - This register is used to configure the duration time between the at_cmd chars."]
     #[inline(always)]
     #[must_use]
-    pub fn rx_gap_tout(&mut self) -> RX_GAP_TOUT_W<AT_CMD_GAPTOUT_SYNC_SPEC> {
+    pub fn rx_gap_tout(&mut self) -> RX_GAP_TOUT_W<AT_CMD_GAPTOUT_SPEC> {
         RX_GAP_TOUT_W::new(self, 0)
     }
     #[doc = r" Writes raw bits to the register."]
@@ -48,19 +48,19 @@ impl W {
         self
     }
 }
-#[doc = "Timeout configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`at_cmd_gaptout_sync::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`at_cmd_gaptout_sync::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
-pub struct AT_CMD_GAPTOUT_SYNC_SPEC;
-impl crate::RegisterSpec for AT_CMD_GAPTOUT_SYNC_SPEC {
+#[doc = "Timeout configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`at_cmd_gaptout::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`at_cmd_gaptout::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct AT_CMD_GAPTOUT_SPEC;
+impl crate::RegisterSpec for AT_CMD_GAPTOUT_SPEC {
     type Ux = u32;
 }
-#[doc = "`read()` method returns [`at_cmd_gaptout_sync::R`](R) reader structure"]
-impl crate::Readable for AT_CMD_GAPTOUT_SYNC_SPEC {}
-#[doc = "`write(|w| ..)` method takes [`at_cmd_gaptout_sync::W`](W) writer structure"]
-impl crate::Writable for AT_CMD_GAPTOUT_SYNC_SPEC {
+#[doc = "`read()` method returns [`at_cmd_gaptout::R`](R) reader structure"]
+impl crate::Readable for AT_CMD_GAPTOUT_SPEC {}
+#[doc = "`write(|w| ..)` method takes [`at_cmd_gaptout::W`](W) writer structure"]
+impl crate::Writable for AT_CMD_GAPTOUT_SPEC {
     const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
     const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
 }
-#[doc = "`reset()` method sets AT_CMD_GAPTOUT_SYNC to value 0x0b"]
-impl crate::Resettable for AT_CMD_GAPTOUT_SYNC_SPEC {
+#[doc = "`reset()` method sets AT_CMD_GAPTOUT to value 0x0b"]
+impl crate::Resettable for AT_CMD_GAPTOUT_SPEC {
     const RESET_VALUE: u32 = 0x0b;
 }

esp32p4/src/uart0/at_cmd_postcnt_sync.rs → esp32p4/src/uart0/at_cmd_postcnt.rs

@@ -1,7 +1,7 @@
-#[doc = "Register `AT_CMD_POSTCNT_SYNC` reader"]
-pub type R = crate::R<AT_CMD_POSTCNT_SYNC_SPEC>;
-#[doc = "Register `AT_CMD_POSTCNT_SYNC` writer"]
-pub type W = crate::W<AT_CMD_POSTCNT_SYNC_SPEC>;
+#[doc = "Register `AT_CMD_POSTCNT` reader"]
+pub type R = crate::R<AT_CMD_POSTCNT_SPEC>;
+#[doc = "Register `AT_CMD_POSTCNT` writer"]
+pub type W = crate::W<AT_CMD_POSTCNT_SPEC>;
 #[doc = "Field `POST_IDLE_NUM` reader - This register is used to configure the duration time between the last at_cmd and the next data."]
 pub type POST_IDLE_NUM_R = crate::FieldReader<u16>;
 #[doc = "Field `POST_IDLE_NUM` writer - This register is used to configure the duration time between the last at_cmd and the next data."]
@@ -16,7 +16,7 @@ impl R {
 #[cfg(feature = "impl-register-debug")]
 impl core::fmt::Debug for R {
     fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
-        f.debug_struct("AT_CMD_POSTCNT_SYNC")
+        f.debug_struct("AT_CMD_POSTCNT")
             .field(
                 "post_idle_num",
                 &format_args!("{}", self.post_idle_num().bits()),
@@ -25,7 +25,7 @@ impl core::fmt::Debug for R {
     }
 }
 #[cfg(feature = "impl-register-debug")]
-impl core::fmt::Debug for crate::generic::Reg<AT_CMD_POSTCNT_SYNC_SPEC> {
+impl core::fmt::Debug for crate::generic::Reg<AT_CMD_POSTCNT_SPEC> {
     fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
         core::fmt::Debug::fmt(&self.read(), f)
     }
@@ -34,7 +34,7 @@ impl W {
     #[doc = "Bits 0:15 - This register is used to configure the duration time between the last at_cmd and the next data."]
     #[inline(always)]
     #[must_use]
-    pub fn post_idle_num(&mut self) -> POST_IDLE_NUM_W<AT_CMD_POSTCNT_SYNC_SPEC> {
+    pub fn post_idle_num(&mut self) -> POST_IDLE_NUM_W<AT_CMD_POSTCNT_SPEC> {
         POST_IDLE_NUM_W::new(self, 0)
     }
     #[doc = r" Writes raw bits to the register."]
@@ -48,19 +48,19 @@ impl W {
         self
     }
 }
-#[doc = "Post-sequence timing configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`at_cmd_postcnt_sync::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`at_cmd_postcnt_sync::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
-pub struct AT_CMD_POSTCNT_SYNC_SPEC;
-impl crate::RegisterSpec for AT_CMD_POSTCNT_SYNC_SPEC {
+#[doc = "Post-sequence timing configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`at_cmd_postcnt::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`at_cmd_postcnt::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct AT_CMD_POSTCNT_SPEC;
+impl crate::RegisterSpec for AT_CMD_POSTCNT_SPEC {
     type Ux = u32;
 }
-#[doc = "`read()` method returns [`at_cmd_postcnt_sync::R`](R) reader structure"]
-impl crate::Readable for AT_CMD_POSTCNT_SYNC_SPEC {}
-#[doc = "`write(|w| ..)` method takes [`at_cmd_postcnt_sync::W`](W) writer structure"]
-impl crate::Writable for AT_CMD_POSTCNT_SYNC_SPEC {
+#[doc = "`read()` method returns [`at_cmd_postcnt::R`](R) reader structure"]
+impl crate::Readable for AT_CMD_POSTCNT_SPEC {}
+#[doc = "`write(|w| ..)` method takes [`at_cmd_postcnt::W`](W) writer structure"]
+impl crate::Writable for AT_CMD_POSTCNT_SPEC {
     const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
     const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
 }
-#[doc = "`reset()` method sets AT_CMD_POSTCNT_SYNC to value 0x0901"]
-impl crate::Resettable for AT_CMD_POSTCNT_SYNC_SPEC {
+#[doc = "`reset()` method sets AT_CMD_POSTCNT to value 0x0901"]
+impl crate::Resettable for AT_CMD_POSTCNT_SPEC {
     const RESET_VALUE: u32 = 0x0901;
 }

esp32p4/src/uart0/at_cmd_precnt_sync.rs → esp32p4/src/uart0/at_cmd_precnt.rs

@@ -1,7 +1,7 @@
-#[doc = "Register `AT_CMD_PRECNT_SYNC` reader"]
-pub type R = crate::R<AT_CMD_PRECNT_SYNC_SPEC>;
-#[doc = "Register `AT_CMD_PRECNT_SYNC` writer"]
-pub type W = crate::W<AT_CMD_PRECNT_SYNC_SPEC>;
+#[doc = "Register `AT_CMD_PRECNT` reader"]
+pub type R = crate::R<AT_CMD_PRECNT_SPEC>;
+#[doc = "Register `AT_CMD_PRECNT` writer"]
+pub type W = crate::W<AT_CMD_PRECNT_SPEC>;
 #[doc = "Field `PRE_IDLE_NUM` reader - This register is used to configure the idle duration time before the first at_cmd is received by receiver."]
 pub type PRE_IDLE_NUM_R = crate::FieldReader<u16>;
 #[doc = "Field `PRE_IDLE_NUM` writer - This register is used to configure the idle duration time before the first at_cmd is received by receiver."]
@@ -16,7 +16,7 @@ impl R {
 #[cfg(feature = "impl-register-debug")]
 impl core::fmt::Debug for R {
     fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
-        f.debug_struct("AT_CMD_PRECNT_SYNC")
+        f.debug_struct("AT_CMD_PRECNT")
             .field(
                 "pre_idle_num",
                 &format_args!("{}", self.pre_idle_num().bits()),
@@ -25,7 +25,7 @@ impl core::fmt::Debug for R {
     }
 }
 #[cfg(feature = "impl-register-debug")]
-impl core::fmt::Debug for crate::generic::Reg<AT_CMD_PRECNT_SYNC_SPEC> {
+impl core::fmt::Debug for crate::generic::Reg<AT_CMD_PRECNT_SPEC> {
     fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
         core::fmt::Debug::fmt(&self.read(), f)
     }
@@ -34,7 +34,7 @@ impl W {
     #[doc = "Bits 0:15 - This register is used to configure the idle duration time before the first at_cmd is received by receiver."]
     #[inline(always)]
     #[must_use]
-    pub fn pre_idle_num(&mut self) -> PRE_IDLE_NUM_W<AT_CMD_PRECNT_SYNC_SPEC> {
+    pub fn pre_idle_num(&mut self) -> PRE_IDLE_NUM_W<AT_CMD_PRECNT_SPEC> {
         PRE_IDLE_NUM_W::new(self, 0)
     }
     #[doc = r" Writes raw bits to the register."]
@@ -48,19 +48,19 @@ impl W {
         self
     }
 }
-#[doc = "Pre-sequence timing configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`at_cmd_precnt_sync::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`at_cmd_precnt_sync::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
-pub struct AT_CMD_PRECNT_SYNC_SPEC;
-impl crate::RegisterSpec for AT_CMD_PRECNT_SYNC_SPEC {
+#[doc = "Pre-sequence timing configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`at_cmd_precnt::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`at_cmd_precnt::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct AT_CMD_PRECNT_SPEC;
+impl crate::RegisterSpec for AT_CMD_PRECNT_SPEC {
     type Ux = u32;
 }
-#[doc = "`read()` method returns [`at_cmd_precnt_sync::R`](R) reader structure"]
-impl crate::Readable for AT_CMD_PRECNT_SYNC_SPEC {}
-#[doc = "`write(|w| ..)` method takes [`at_cmd_precnt_sync::W`](W) writer structure"]
-impl crate::Writable for AT_CMD_PRECNT_SYNC_SPEC {
+#[doc = "`read()` method returns [`at_cmd_precnt::R`](R) reader structure"]
+impl crate::Readable for AT_CMD_PRECNT_SPEC {}
+#[doc = "`write(|w| ..)` method takes [`at_cmd_precnt::W`](W) writer structure"]
+impl crate::Writable for AT_CMD_PRECNT_SPEC {
     const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
     const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
 }
-#[doc = "`reset()` method sets AT_CMD_PRECNT_SYNC to value 0x0901"]
-impl crate::Resettable for AT_CMD_PRECNT_SYNC_SPEC {
+#[doc = "`reset()` method sets AT_CMD_PRECNT to value 0x0901"]
+impl crate::Resettable for AT_CMD_PRECNT_SPEC {
     const RESET_VALUE: u32 = 0x0901;
 }

esp32p4/src/uart0/clkdiv_sync.rs → esp32p4/src/uart0/clkdiv.rs

@@ -1,7 +1,7 @@
-#[doc = "Register `CLKDIV_SYNC` reader"]
-pub type R = crate::R<CLKDIV_SYNC_SPEC>;
-#[doc = "Register `CLKDIV_SYNC` writer"]
-pub type W = crate::W<CLKDIV_SYNC_SPEC>;
+#[doc = "Register `CLKDIV` reader"]
+pub type R = crate::R<CLKDIV_SPEC>;
+#[doc = "Register `CLKDIV` writer"]
+pub type W = crate::W<CLKDIV_SPEC>;
 #[doc = "Field `CLKDIV` reader - The integral part of the frequency divider factor."]
 pub type CLKDIV_R = crate::FieldReader<u16>;
 #[doc = "Field `CLKDIV` writer - The integral part of the frequency divider factor."]
@@ -25,7 +25,7 @@ impl R {
 #[cfg(feature = "impl-register-debug")]
 impl core::fmt::Debug for R {
     fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
-        f.debug_struct("CLKDIV_SYNC")
+        f.debug_struct("CLKDIV")
             .field("clkdiv", &format_args!("{}", self.clkdiv().bits()))
             .field(
                 "clkdiv_frag",
@@ -35,7 +35,7 @@ impl core::fmt::Debug for R {
     }
 }
 #[cfg(feature = "impl-register-debug")]
-impl core::fmt::Debug for crate::generic::Reg<CLKDIV_SYNC_SPEC> {
+impl core::fmt::Debug for crate::generic::Reg<CLKDIV_SPEC> {
     fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
         core::fmt::Debug::fmt(&self.read(), f)
     }
@@ -44,13 +44,13 @@ impl W {
     #[doc = "Bits 0:11 - The integral part of the frequency divider factor."]
     #[inline(always)]
     #[must_use]
-    pub fn clkdiv(&mut self) -> CLKDIV_W<CLKDIV_SYNC_SPEC> {
+    pub fn clkdiv(&mut self) -> CLKDIV_W<CLKDIV_SPEC> {
         CLKDIV_W::new(self, 0)
     }
     #[doc = "Bits 20:23 - The decimal part of the frequency divider factor."]
     #[inline(always)]
     #[must_use]
-    pub fn clkdiv_frag(&mut self) -> CLKDIV_FRAG_W<CLKDIV_SYNC_SPEC> {
+    pub fn clkdiv_frag(&mut self) -> CLKDIV_FRAG_W<CLKDIV_SPEC> {
         CLKDIV_FRAG_W::new(self, 20)
     }
     #[doc = r" Writes raw bits to the register."]
@@ -64,19 +64,19 @@ impl W {
         self
     }
 }
-#[doc = "Clock divider configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`clkdiv_sync::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clkdiv_sync::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
-pub struct CLKDIV_SYNC_SPEC;
-impl crate::RegisterSpec for CLKDIV_SYNC_SPEC {
+#[doc = "Clock divider configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`clkdiv::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clkdiv::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+pub struct CLKDIV_SPEC;
+impl crate::RegisterSpec for CLKDIV_SPEC {
     type Ux = u32;
 }
-#[doc = "`read()` method returns [`clkdiv_sync::R`](R) reader structure"]
-impl crate::Readable for CLKDIV_SYNC_SPEC {}
-#[doc = "`write(|w| ..)` method takes [`clkdiv_sync::W`](W) writer structure"]
-impl crate::Writable for CLKDIV_SYNC_SPEC {
+#[doc = "`read()` method returns [`clkdiv::R`](R) reader structure"]
+impl crate::Readable for CLKDIV_SPEC {}
+#[doc = "`write(|w| ..)` method takes [`clkdiv::W`](W) writer structure"]
+impl crate::Writable for CLKDIV_SPEC {
     const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
     const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
 }
-#[doc = "`reset()` method sets CLKDIV_SYNC to value 0x02b6"]
-impl crate::Resettable for CLKDIV_SYNC_SPEC {
+#[doc = "`reset()` method sets CLKDIV to value 0x02b6"]
+impl crate::Resettable for CLKDIV_SPEC {
     const RESET_VALUE: u32 = 0x02b6;
 }