Added documentation and a separate reset

README.md

@@ -1,41 +1,23 @@
 ![](../../workflows/gds/badge.svg) ![](../../workflows/docs/badge.svg) ![](../../workflows/test/badge.svg)
 
-# Tiny Tapeout Verilog Project Template
+# Tiny Tapeout 6: Simple Stopwatch
 
-- [Read the documentation for project](docs/info.md)
+This is a verilog stopwatch to be realised in a "rideshare" open source ASIC organised by Tiny Tapeout.
+I made a very similar stopwatch as part of an assignment in an FPGA class in VHDL, and wanted to learn verilog and ASIC design by porting it over.
 
-## What is Tiny Tapeout?
-
-TinyTapeout is an educational project that aims to make it easier and cheaper than ever to get your digital designs manufactured on a real chip.
-
-To learn more and get started, visit https://tinytapeout.com.
-
-## Verilog Projects
+With 3 buttons, a stopwatch with 1/100th second precision can be started and stopped, as well as a lap time kept temporarily.
 
-1. Add your Verilog files to the `src` folder.
-2. Edit the [info.yaml](info.yaml) and update information about your project, paying special attention to the `source_files` and `top_module` properties. If you are upgrading an existing Tiny Tapeout project, check out our [online info.yaml migration tool](https://tinytapeout.github.io/tt-yaml-upgrade-tool/).
-3. Edit [docs/info.md](docs/info.md) and add a description of your project.
-4. Optionally, add a testbench to the `test` folder. See [test/README.md](test/README.md) for more information.
+For more, read the [Tiny Tapeout documentation](docs/info.md)
 
-The GitHub action will automatically build the ASIC files using [OpenLane](https://www.zerotoasiccourse.com/terminology/openlane/).
+## How to use
 
-## Enable GitHub actions to build the results page
+You will need the Tiny Tapeout 6 PCB/chip. See the [Tiny Tapeout documentation](docs/info.md).
+A minimum of 2 buttons, preferrably 3 are needed.
+This project was designed to display its output via SPI using a MAX7219/MAX7221 driven 7-segment display with 8 digits. If you have something else that can decode that, this should work as well. I will try to add some documentation on this, if I did not, check out the documentation of the MAX chip.
 
-- [Enabling GitHub Pages](https://tinytapeout.com/faq/#my-github-action-is-failing-on-the-pages-part)
-
-## Resources
-
-- [FAQ](https://tinytapeout.com/faq/)
-- [Digital design lessons](https://tinytapeout.com/digital_design/)
-- [Learn how semiconductors work](https://tinytapeout.com/siliwiz/)
-- [Join the community](https://tinytapeout.com/discord)
-- [Build your design locally](https://docs.google.com/document/d/1aUUZ1jthRpg4QURIIyzlOaPWlmQzr-jBn3wZipVUPt4)
+## What is Tiny Tapeout?
 
-## What next?
+TinyTapeout is an educational project that aims to make it easier and cheaper than ever to get your digital designs manufactured on a real chip.
+Each run, one or more tiles can be bought on the overall chip and filled with custom designs.
 
-- [Submit your design to the next shuttle](https://app.tinytapeout.com/).
-- Edit [this README](README.md) and explain your design, how it works, and how to test it.
-- Share your project on your social network of choice:
-  - LinkedIn [#tinytapeout](https://www.linkedin.com/search/results/content/?keywords=%23tinytapeout) [@TinyTapeout](https://www.linkedin.com/company/100708654/)
-  - Mastodon [#tinytapeout](https://chaos.social/tags/tinytapeout) [@matthewvenn](https://chaos.social/@matthewvenn)
-  - X (formerly Twitter) [#tinytapeout](https://twitter.com/hashtag/tinytapeout) [@matthewvenn](https://twitter.com/matthewvenn)
+To learn more and get started yourself, visit https://tinytapeout.com and/or [Join the community](https://tinytapeout.com/discord).

docs/info.md

@@ -9,12 +9,13 @@ You can also include images in this folder and reference them in the markdown. E
 
 ## How it works
 
-It stops the time
+A clock divider turns 1 MHz into 100 Hz, which drives a stopwatch going from 00:00:00 to 59:59:99. To achieve this, a chain of two types of counting circuit, one per digit gives it's output to an SPI master that encodes the result to be displayed on a 7-segment display with at least 6 digits.
 
 ## How to test
 
-Hit button and watch the clock
+The start/stop button toggles the clock, the lap time button pauses the display, while the clock keeps running in the background. Pressing it again re-enables the display. The time can be reset with the reset button on input 2, or with the chip/PCB wide reset. The PCB wide reset affects everything, the input pin driven reset does only resets the counters.
 
 ## External hardware
 
-Button and display
+2-3 buttons, one for start/stop and one for lap times. For the reset, either a third button or the dev board's reset for the whole chip can be used.
+1 MAX7219/MAX7221 driven 7-segment display, or something that can interpret the SPI signal according to the MAX's specifications.

info.yaml

@@ -22,7 +22,7 @@ pinout:
   # Inputs
   ui[0]: "start/stop"
   ui[1]: "lap time"
-  ui[2]: ""
+  ui[2]: "reset (active high)"
   ui[3]: ""
   ui[4]: ""
   ui[5]: ""

src/stopwatch_top.v

@@ -25,6 +25,12 @@ module tt_um_faramire_stopwatch (
   wire dividedClock; // 100 Hz clock
   wire counter_enable;
   wire display_enable;
+  wire reset_either; // an OR of the input reset and the chip wide reset, for those that shall be affected by both
+  wire clock_enable; // and AND of the clock with the counter enable,
+                     // so that the clock divider doesn't advance when the counters are halted
+
+  assign reset_either = rst_n | (~ui_in[2]);
+  assign clock_enable = counter_enable & clk;
 
   wire [2:0] min_X0; // all the results of the counter chain
   wire [3:0] min_0X;
@@ -34,8 +40,8 @@ module tt_um_faramire_stopwatch (
   wire [3:0] ces_0X;
 
   clockDivider inst1 ( // divides the 100 MHz clock to 100 Hz
-    .clk_in  (clk),
-    .res     (rst_n),
+    .clk_in  (clock_enable),
+    .res     (reset_either),
     .clk_out (dividedClock)
   );
 
@@ -53,7 +59,7 @@ module tt_um_faramire_stopwatch (
   counter_chain inst1 ( // a chain of 6 counters that count from 00:00:00 to 59:59:99
     .clk (dividedClock),
     .ena (counter_enable),
-    .res (rst_n),
+    .res (reset_either),
     .min_X0 (min_X0)
     .min_0X (min_0X),
     .sec_X0 (sec_X0),
@@ -64,7 +70,7 @@ module tt_um_faramire_stopwatch (
 
   SPI_driver inst1 ( // drives the 7-segment displays connected via a MAX7219 chip over SPI
     .clk (clk),
-    .res (res),
+    .res (rst_n),
     .ena (display_enable),
     .min_X0 (min_X0)
     .min_0X (min_0X),