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Issues: fpgasystems/fpga-network-stack
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Build error - ERROR: [HLS 207-3776] use of undeclared identifier 'FNS_ROCE_STACK_MAX_QPS'
#36
opened Apr 2, 2024 by
vasyaa
Can this design be targeted on Alveo u50 xilinx_u50_gen3x16_xdma_5_202210_1 platform?
#34
opened Mar 6, 2024 by
lizajoseph
There may be a bug in the txEngMemAccessBreakdown() module?
#31
opened May 31, 2023 by
LittleBlackLiu
synthesis error : "tcp_ip_top.v" instantiates a mismathed version of "network_stack.v"?
#27
opened Aug 13, 2021 by
torukskywalker
It's invalid to open dcp file in dir ip using vivado 2019.1
#23
opened Jan 18, 2021 by
xiaoliang201188
can you also please provide the test vectors for the RoCE module? Thank you !!
#22
opened Oct 12, 2020 by
hao310rui140326
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