Merge branch 'megaphoner4-bringup' into development

frehwagen · Sep 24, 2022 · e62658f · e62658f
2 parents 9c03f8a + fa983e6
commit e62658f
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Showing 29 changed files with 4,144 additions and 2,243 deletions.
diff --git a/Makefile b/Makefile
@@ -654,6 +654,18 @@ miimsimulate:	$(GHDL_DEPEND) $(MIIMFILES)
 	$(GHDL) -m test_miim
 	( ./test_miim || $(GHDL) -r test_miim )
 
+ETHFILES=	$(VHDLSRCDIR)/ethernet.vhdl \
+		$(VHDLSRCDIR)/test_ethernet.vhdl
+
+ethsimulate:	$(GHDL_DEPEND) $(ETHFILES)
+	$(info =============================================================)
+	$(info ~~~~~~~~~~~~~~~~> Making: $@)
+	$(GHDL) -i $(ETHFILES)
+	$(GHDL) -m test_ethernet
+	( ./test_ethernet || $(GHDL) -r test_ethernet )
+
+
+
 ASCIIFILES=	$(VHDLSRCDIR)/matrix_to_ascii.vhdl \
 		$(VHDLSRCDIR)/test_ascii.vhdl
 

diff --git a/src/hyppo/targetsetup.asm b/src/hyppo/targetsetup.asm
@@ -19,9 +19,8 @@ targetspecific_setup:
 	cmp #$03
 	beq mega65r3_i2c_setup
 	lda $d629
-	and #$e0
 	cmp #$20
-	beq megaphone_i2c_setup
+	beq megaphone_r1_i2c_setup
 	rts
 	
 mega65r3_i2c_setup:	
@@ -56,7 +55,7 @@ mps3_loop:
 
         jmp mps3_loop
 	
-megaphone_i2c_setup:
+megaphone_r1_i2c_setup:
 
         ;; Start with backscreen very dim, to avoid inrush current
         ;; causing FGPA power rail to sag.
@@ -67,7 +66,7 @@ megaphone_i2c_setup:
         sta $d020
         ldy #$00
 mps_loop:
-        lda megaphone_i2c_settings,y
+        lda megaphone_r1_i2c_settings,y
         cmp #$ff
         bne +
         ldz #$00
@@ -80,7 +79,7 @@ mps_loop:
 +
         taz
         iny
-        lda megaphone_i2c_settings,y
+        lda megaphone_r1_i2c_settings,y
         iny
 
 
@@ -99,7 +98,7 @@ mps_loop:
         jmp mps_loop
 
 
-megaphone_i2c_settings:
+megaphone_r1_i2c_settings:
         ;; LCD panel
         !8 $16,$40 ;; Port 0 to output, except LCD backlight line, that we now control via an FPGA pin
         !8 $17,$00 ;; Port 1 to output

diff --git a/src/mega65-libc b/src/mega65-libc
diff --git a/src/utilities/qspicommon.h b/src/utilities/qspicommon.h
@@ -15,6 +15,8 @@ extern unsigned int page_size;
 extern unsigned char latency_code;
 extern unsigned char reg_cr1;
 extern unsigned char reg_sr1;
+extern unsigned char reg_ppbl;
+extern unsigned char reg_ppb;
 
 extern unsigned char verboseProgram;
 
@@ -67,6 +69,8 @@ void spi_tx_byte(unsigned char b);
 unsigned char qspi_rx_byte(void);
 unsigned char spi_rx_byte(void);
 void read_sr1(void);
+void read_ppb_for_sector(unsigned long sector_start);
+void read_ppbl(void);
 void spi_write_enable(void);
 void spi_clear_sr1(void);
 void spi_write_disable(void);

diff --git a/src/vhdl/buffereduart.vhdl b/src/vhdl/buffereduart.vhdl
@@ -241,7 +241,7 @@ begin  -- behavioural
               fastio_rdata <= x"FF";
             end if;
           when x"6" =>
-            -- @IO:GS $D0E5 Buffered UART bit rate divisor MSB
+            -- @IO:GS $D0E6 Buffered UART bit rate divisor MSB
             if selected_uart < 8 then
               fastio_rdata <= uart_bit_rate_divisor_internal(selected_uart)(23 downto 16);
             else

diff --git a/src/vhdl/c65uart.vhdl b/src/vhdl/c65uart.vhdl
@@ -305,6 +305,7 @@ begin  -- behavioural
       when mega65r3 => target_id <= x"03";
       -- $20-$3F = MEGAphone/handheld versions
       when megaphoner1 => target_id <= x"21";
+      when megaphoner4 => target_id <= x"22";
       -- $40-$5F = Nexys4 / Nexys4 DDR
       when nexys4 => target_id <= x"40";
       when nexys4ddr => target_id <= x"41";

diff --git a/src/vhdl/cia6526.vhdl b/src/vhdl/cia6526.vhdl
@@ -280,14 +280,14 @@ begin  -- behavioural
               -- @IO:C64 $DC0E.1 CIA1:PBONA Timer A PB6 out
               -- @IO:C64 $DC0E.2 CIA1:OMODA Timer A toggle or pulse
               -- @IO:C64 $DC0E.3 CIA1:RMODA Timer A one-shot mode
-              -- @IO:C64 $DC0E.5 CIA1:IMODA Timer A Timer A tick source
+              -- @IO:C64 $DC0E.5 CIA1:IMODA Timer A tick source
               -- @IO:C64 $DC0E.6 CIA1:SPMOD Serial port direction
               -- @IO:C64 $DC0E.7 CIA1:TOD50 50/60Hz select for TOD clock
               -- @IO:C64 $DD0E.0 CIA2:STRTA Timer A start
               -- @IO:C64 $DD0E.1 CIA2:PBONA Timer A PB6 out
               -- @IO:C64 $DD0E.2 CIA2:OMODA Timer A toggle or pulse
               -- @IO:C64 $DD0E.3 CIA2:RMODA Timer A one-shot mode
-              -- @IO:C64 $DD0E.5 CIA2:IMODA Timer A Timer A tick source
+              -- @IO:C64 $DD0E.5 CIA2:IMODA Timer A tick source
               -- @IO:C64 $DD0E.6 CIA2:SPMOD Serial port direction
               -- @IO:C64 $DD0E.7 CIA2:TOD50 50/60Hz select for TOD clock
               fastio_rdata <= reg_50hz
@@ -312,7 +312,7 @@ begin  -- behavioural
               -- @IO:C64 $DD0F.2 CIA2:OMODB Timer B toggle or pulse
               -- @IO:C64 $DD0F.3 CIA2:RMODB Timer B one-shot mode
               -- @IO:C64 $DD0F.4 CIA2:LOAD Strobe input to force-load timers
-              -- @IO:C64 $DD0F.5-6 CIA2:IMODB Timer B Timer A tick source
+              -- @IO:C64 $DD0F.5-6 CIA2:IMODB Timer B tick source
               -- @IO:C64 $DD0F.7 CIA2:TODEDIT TOD alarm edit
               fastio_rdata <= unsigned(reg_tod_alarm_edit
                                        & reg_timerb_tick_source

diff --git a/src/vhdl/clocking.vhdl b/src/vhdl/clocking.vhdl
@@ -57,7 +57,7 @@ begin
 
   adjust0 : MMCM_ADV
   generic map
-   (BANDWIDTH            => "OPTIMIZED",
+   (BANDWIDTH            => "HIGH",
     CLKOUT4_CASCADE      => FALSE,
     CLOCK_HOLD           => FALSE,
     COMPENSATION         => "ZHOLD",
@@ -104,7 +104,7 @@ begin
 
   adjust1 : MMCM_ADV
   generic map
-   (BANDWIDTH            => "OPTIMIZED",
+   (BANDWIDTH            => "HIGH",
     CLKOUT4_CASCADE      => FALSE,
     CLOCK_HOLD           => FALSE,
     COMPENSATION         => "ZHOLD",
@@ -151,7 +151,7 @@ begin
 
     adjust2 : MMCM_ADV
   generic map
-   (BANDWIDTH            => "OPTIMIZED",
+   (BANDWIDTH            => "HIGH",
     CLKOUT4_CASCADE      => FALSE,
     CLOCK_HOLD           => FALSE,
     COMPENSATION         => "ZHOLD",
@@ -242,7 +242,7 @@ begin
 
   mmcm_adv0 : MMCM_ADV
   generic map
-   (BANDWIDTH            => "OPTIMIZED",
+   (BANDWIDTH            => "HIGH",
     CLKOUT4_CASCADE      => FALSE,
     CLOCK_HOLD           => FALSE,
     COMPENSATION         => "ZHOLD",
@@ -329,7 +329,7 @@ begin
 
   mmcm_adv1_eth : MMCM_ADV
   generic map
-   (BANDWIDTH            => "OPTIMIZED",
+   (BANDWIDTH            => "HIGH",
     CLKOUT4_CASCADE      => FALSE,
     CLOCK_HOLD           => FALSE,
     COMPENSATION         => "ZHOLD",

diff --git a/src/vhdl/cputypes.vhdl b/src/vhdl/cputypes.vhdl
@@ -8,7 +8,7 @@ package cputypes is
   type mega65_target_t is (
     simulation,
     mega65r1, mega65r2, mega65r3,
-    megaphoner1,
+    megaphoner1, megaphoner4,
     nexys4, nexys4ddr, nexys4ddr_widget,
     wukong
     );
+14 −0		.clang-format
+6 −0		.gitignore
+6 −0		README.md
+1 −0		cc65/include/targets.h
+12 −0		clang/.gitignore
+55 −0		clang/CMakeLists.txt
+43 −0		clang/README.md
+6 −0		clang/cmake/mega65libcConfig.cmake
+776 −0		clang/include/conio.h
+1 −0		clang/include/debug.h
+14 −0		clang/include/dirent.h
+17 −0		clang/include/fileio.h
+8 −0		clang/include/hal.h
+38 −0		clang/include/memory.h
+9 −0		clang/include/random.h
+18 −0		clang/include/sdcard.h
+18 −0		clang/include/targets.h
+61 −0		clang/include/tests.h
+25 −0		clang/include/time.h
+742 −0		clang/src/conio.c
+21 −0		clang/src/debug.c
+103 −0		clang/src/dirent.s
+10 −0		clang/src/example.c
+127 −0		clang/src/fat32.c
+221 −0		clang/src/fileio.s
+16 −0		clang/src/hal.c
+178 −0		clang/src/memory.c
+136 −0		clang/src/mouse.c
+164 −0		clang/src/random.c
+466 −0		clang/src/sdcard.c
+12 −0		clang/src/targets.c
+88 −0		clang/src/tests.c
+148 −0		clang/src/time.c
+2 −1		kickc/include/targets.h