update to latest gdsfactory

gdsfactory · Sep 9, 2023 · f8e775c · f8e775c
1 parent b0f9a6b
commit f8e775c
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Showing 26 changed files with 160 additions and 126 deletions.
diff --git a/gf180/diode.py b/gf180/diode.py
@@ -321,7 +321,6 @@ def diode_nd2ps(
 
 @gf.cell
 def diode_pd2nw(
-    layout,
     la: float = 0.1,
     wa: float = 0.1,
     cw: float = 0.1,
@@ -642,17 +641,16 @@ def diode_nw2ps(
     p_label: str = "",
     n_label: str = "",
 ) -> gf.Component:
-    """
-    Usage:-
-     used to draw 3.3V Nwell/Psub diode by specifying parameters
-    Arguments:-
-     la         : Float of diff length (anode)
-     wa         : Float of diff width (anode)
-     cw         : Float of Cathode width
-     volt       : String of operating voltage of the diode [3.3V, 5V/6V]
+    """used to draw 3.3V Nwell/Psub diode by specifying parameters
+
+    Args:
+        la: anode length.
+        wa: anode width.
+        cw: cathode width.
+        volt: operating voltage of the diode [3.3V, 5V/6V]
     """
 
-    c = gf.Component("diode_nw2ps_dev")
+    c = gf.Component()
 
     comp_spacing: float = 0.48
     np_enc_comp: float = 0.16
@@ -778,17 +776,20 @@ def diode_pw2dw(
     n_label: str = "",
 ) -> gf.Component:
     """
-    Usage:-
-     used to draw LVPWELL/DNWELL diode by specifying parameters
-    Arguments:-
-     layout     : Object of layout
-     la         : Float of diff length (anode)
-     wa         : Float of diff width (anode)
-     cw         : Float of cathode width
-     volt       : String of operating voltage of the diode [3.3V, 5V/6V]
+    used to draw LVPWELL/DNWELL diode by specifying parameters
+
+    Args:
+        la: anode length.
+        wa: anode width.
+        cw: cathode width.
+        volt: operating voltage of the diode [3.3V, 5V/6V]
+        pcmpgr: if True, pcmpgr will be added.
+        label: if True, labels will be added.
+        p_label: p contact label.
+        n_label: n contact label.
     """
 
-    c = gf.Component("diode_pw2dw_dev")
+    c = gf.Component()
 
     comp_spacing: float = 0.48
     np_enc_comp: float = 0.16
@@ -1086,16 +1087,20 @@ def diode_dw2ps(
     p_label: str = "",
     n_label: str = "",
 ) -> gf.Component:
-    """
-    Usage:-
-     used to draw LVPWELL/DNWELL diode by specifying parameters
-    Arguments:-
-     la         : Float of diff length (anode)
-     wa         : Float of diff width (anode)
-     volt       : String of operating voltage of the diode [3.3V, 5V/6V]
+    """used to draw LVPWELL/DNWELL diode by specifying parameters
+
+    Args:
+        la: anode length.
+        wa: anode width.
+        cw: cathode width.
+        volt: operating voltage of the diode [3.3V, 5V/6V].
+        pcmpgr: True if pwell guardring is required.
+        label: True if labels are required.
+        p_label: label for pwell.
+        n_label: label for nwell.
     """
 
-    c = gf.Component("diode_dw2ps_dev")
+    c = gf.Component()
 
     if volt == "5/6V":
         dn_enc_ncmp = 0.66
@@ -1886,5 +1891,6 @@ def sc_anode_strap(size: Float2 = (0.1, 0.1)) -> gf.Component:
 
 
 if __name__ == "__main__":
-    c = sc_diode()
+    # c = sc_diode()
+    c = diode_pd2nw()
     c.show()
diff --git a/gf180/guardring.py b/gf180/guardring.py
@@ -1,9 +1,11 @@
+from functools import partial
+
 import gdsfactory as gf
 
 from gf180.layers import LAYER, layer
 from gf180.via_generator import via_generator
 
-dn_rect = gf.partial(gf.components.rectangle, layer=LAYER.dnwell)
+dn_rect = partial(gf.components.rectangle, layer=LAYER.dnwell)
 
 
 @gf.cell

diff --git a/pyproject.toml b/pyproject.toml
@@ -14,7 +14,7 @@ classifiers = [
   "Operating System :: OS Independent"
 ]
 dependencies = [
-  "gdsfactory[cad]>=7.1.1,<7.2.0"
+  "gdsfactory[cad]>=7.4.6,<7.5.0"
 ]
 description = "GlobalFoundries 180nm MCU"
 keywords = ["python"]

diff --git a/tests/gds_ref/cap_mim.gds b/tests/gds_ref/cap_mim.gds
diff --git a/tests/test_components/test_pdk_settings_cap_mim_.yml b/tests/test_components/test_pdk_settings_cap_mim_.yml
@@ -0,0 +1,26 @@
+name: cap_mim
+ports: {}
+settings:
+  changed: {}
+  child: null
+  default:
+    bot_label: ''
+    label: false
+    lc: 2
+    metal_level: M4
+    mim_option: A
+    top_label: ''
+    wc: 2
+  full:
+    bot_label: ''
+    label: false
+    lc: 2
+    metal_level: M4
+    mim_option: A
+    top_label: ''
+    wc: 2
+  function_name: cap_mim
+  info: {}
+  info_version: 2
+  module: gf180.cap_mim
+  name: cap_mim
diff --git a/tests/test_components/test_pdk_settings_cap_mos_.yml b/tests/test_components/test_pdk_settings_cap_mos_.yml
@@ -4,21 +4,21 @@ settings:
   changed: {}
   child: null
   default:
-    deepnwell: 0
+    deepnwell: false
     g_label: ''
-    label: 0
+    label: false
     lc: 0.1
-    pcmpgr: 0
+    pcmpgr: false
     sd_label: ''
     type: cap_nmos
     volt: 3.3V
     wc: 0.1
   full:
-    deepnwell: 0
+    deepnwell: false
     g_label: ''
-    label: 0
+    label: false
     lc: 0.1
-    pcmpgr: 0
+    pcmpgr: false
     sd_label: ''
     type: cap_nmos
     volt: 3.3V

diff --git a/tests/test_components/test_pdk_settings_cap_mos_inst_.yml b/tests/test_components/test_pdk_settings_cap_mos_inst_.yml
@@ -14,7 +14,7 @@ settings:
     implant_layer:
     - 32
     - 0
-    label: 0
+    label: false
     lc: 0.1
     pl_ext: 0.1
     pl_l: 0.1
@@ -30,7 +30,7 @@ settings:
     implant_layer:
     - 32
     - 0
-    label: 0
+    label: false
     lc: 0.1
     pl_ext: 0.1
     pl_l: 0.1

diff --git a/tests/test_components/test_pdk_settings_diode_dw2ps_.yml b/tests/test_components/test_pdk_settings_diode_dw2ps_.yml
@@ -6,19 +6,19 @@ settings:
   default:
     cw: 0.1
     la: 0.1
-    label: 0
+    label: false
     n_label: ''
     p_label: ''
-    pcmpgr: 0
+    pcmpgr: false
     volt: 3.3V
     wa: 0.1
   full:
     cw: 0.1
     la: 0.1
-    label: 0
+    label: false
     n_label: ''
     p_label: ''
-    pcmpgr: 0
+    pcmpgr: false
     volt: 3.3V
     wa: 0.1
   function_name: diode_dw2ps

diff --git a/tests/test_components/test_pdk_settings_diode_nd2ps_.yml b/tests/test_components/test_pdk_settings_diode_nd2ps_.yml
@@ -5,22 +5,22 @@ settings:
   child: null
   default:
     cw: 0.1
-    deepnwell: 0
+    deepnwell: false
     la: 0.1
-    label: 0
+    label: false
     n_label: ''
     p_label: ''
-    pcmpgr: 0
+    pcmpgr: false
     volt: 3.3V
     wa: 0.1
   full:
     cw: 0.1
-    deepnwell: 0
+    deepnwell: false
     la: 0.1
-    label: 0
+    label: false
     n_label: ''
     p_label: ''
-    pcmpgr: 0
+    pcmpgr: false
     volt: 3.3V
     wa: 0.1
   function_name: diode_nd2ps

diff --git a/tests/test_components/test_pdk_settings_diode_nw2ps_.yml b/tests/test_components/test_pdk_settings_diode_nw2ps_.yml
@@ -6,15 +6,15 @@ settings:
   default:
     cw: 0.1
     la: 0.1
-    label: 0
+    label: false
     n_label: ''
     p_label: ''
     volt: 3.3V
     wa: 0.1
   full:
     cw: 0.1
     la: 0.1
-    label: 0
+    label: false
     n_label: ''
     p_label: ''
     volt: 3.3V

diff --git a/tests/test_components/test_pdk_settings_diode_pw2dw_.yml b/tests/test_components/test_pdk_settings_diode_pw2dw_.yml
@@ -6,19 +6,19 @@ settings:
   default:
     cw: 0.1
     la: 0.1
-    label: 0
+    label: false
     n_label: ''
     p_label: ''
-    pcmpgr: 0
+    pcmpgr: false
     volt: 3.3V
     wa: 0.1
   full:
     cw: 0.1
     la: 0.1
-    label: 0
+    label: false
     n_label: ''
     p_label: ''
-    pcmpgr: 0
+    pcmpgr: false
     volt: 3.3V
     wa: 0.1
   function_name: diode_pw2dw

diff --git a/tests/test_components/test_pdk_settings_labels_gen_.yml b/tests/test_components/test_pdk_settings_labels_gen_.yml
@@ -5,25 +5,25 @@ settings:
   child: null
   default:
     index: 0
+    label: false
+    label_str: ''
+    label_valid_len: 1
     labels: null
     layer:
     - 34
     - 10
-    label: 0
-    label_str: ''
-    label_valid_len: 1
     position:
     - 0.1
     - 0.1
   full:
     index: 0
+    label: false
+    label_str: ''
+    label_valid_len: 1
     labels: null
     layer:
     - 34
     - 10
-    label: 0
-    label_str: ''
-    label_valid_len: 1
     position:
     - 0.1
     - 0.1

diff --git a/tests/test_components/test_pdk_settings_nfet_.yml b/tests/test_components/test_pdk_settings_nfet_.yml
@@ -13,10 +13,10 @@ settings:
     inter_sd_l: 0.24
     interdig: 0
     l_gate: 0.28
-    label: 0
+    label: false
     nf: 1
     patt: ''
-    patt_label: 0
+    patt_label: false
     pcmpgr: 0
     sd_con_col: 1
     sd_label: []
@@ -33,10 +33,10 @@ settings:
     inter_sd_l: 0.24
     interdig: 0
     l_gate: 0.28
-    label: 0
+    label: false
     nf: 1
     patt: ''
-    patt_label: 0
+    patt_label: false
     pcmpgr: 0
     sd_con_col: 1
     sd_label: []

diff --git a/tests/test_components/test_pdk_settings_nfet_06v0_nvt_.yml b/tests/test_components/test_pdk_settings_nfet_06v0_nvt_.yml
@@ -12,10 +12,10 @@ settings:
     inter_sd_l: 0.24
     interdig: 0
     l_gate: 1.8
-    label: 0
+    label: false
     nf: 1
     patt: ''
-    patt_label: 0
+    patt_label: false
     sd_con_col: 1
     sd_label: []
     sub_label: ''
@@ -29,10 +29,10 @@ settings:
     inter_sd_l: 0.24
     interdig: 0
     l_gate: 1.8
-    label: 0
+    label: false
     nf: 1
     patt: ''
-    patt_label: 0
+    patt_label: false
     sd_con_col: 1
     sd_label: []
     sub_label: ''