Merge branch 'gh-pages' of github.com:gnss-sdr/geniuss-place

_posts/2017-03-07-configuration-options-building-time.md

@@ -176,9 +176,9 @@ package (`sudo apt-get install gnss-sdr`), the option `ENABLE_OSMOSDR` is set to
 | :--------------------------- | :-----------------: | :---------: | :-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- |
 | --------------               |
 | `-DENABLE_FPGA`              |    `ON` / `OFF`     |    `OFF`    | If set to `ON`, it enables the building of processing blocks implemented in VHDL, which are executed on a SoC FPGA device, allowing for FPGA-based off-loading. |
-| `-DENABLE_MAX2771`           |    `ON` / `OFF`     |    `OFF`    | If set to `ON`, it checks if the SPIdev driver is installed and builds the `MAX2771_EVKIT_Signal_Source_FPGA` source, which makes use of an Analog Devices' MAX2771 RF front-end connected directly to an FPGA processor. Requires `-DENABLE_FPGA=ON`. <span style="color: orange">This configuration option is only present in the `next` branch of the upstream repository and it will be present in the next stable release.</span> | 
-| `-DENABLE_AD9361`            |    `ON` / `OFF`     |    `OFF`    | If set to `ON`, it checks if the IIO driver [libiio](https://github.com/analogdevicesinc/libiio) >= 0.14 is installed and builds the `ADRV9361_Z7035_Signal_Source_FPGA` and the `FMCOMMS5_Signal_Source_FPGA` sources, which make use of Analog Devices' AD9361 RF front-end connected directly to an FPGA processor. Requires `-DENABLE_FPGA=ON`. |
-| `-DENABLE_DMA_PROXY` |    `ON` / `OFF`     |    `OFF`    | Checks if the DMA proxy driver is installed for controlling the DMA in the FPGA and enables its usage via the `DMA_Signal_Source_FPGA` source. Requires `-DENABLE_FPGA=ON`. <span style="color: orange">This configuration option is only present in the `next` branch of the upstream repository and it will be present in the next stable release.</span> |
+| `-DENABLE_MAX2771`           |    `ON` / `OFF`     |    `OFF`    | If set to `ON`, it checks if the SPIdev driver is installed and builds the `MAX2771_EVKIT_Signal_Source_FPGA` source, which makes use of an Analog Devices' [MAX2771](https://www.analog.com/en/products/max2771.html) RF front-end connected directly to an FPGA processor. Requires `-DENABLE_FPGA=ON`. <span style="color: orange">This configuration option is only present in the `next` branch of the upstream repository and it will be present in the next stable release.</span> |
+| `-DENABLE_AD9361`            |    `ON` / `OFF`     |    `OFF`    | If set to `ON`, it checks if the IIO driver [libiio](https://github.com/analogdevicesinc/libiio) >= 0.14 is installed and builds the `ADRV9361_Z7035_Signal_Source_FPGA` and the `FMCOMMS5_Signal_Source_FPGA` sources, which make use of Analog Devices' [AD9361](https://www.analog.com/en/products/ad9361.html) RF front-end connected directly to an FPGA processor. Requires `-DENABLE_FPGA=ON`. |
+| `-DENABLE_DMA_PROXY` |    `ON` / `OFF`     |    `OFF`    | If set to `ON`, it checks if the DMA proxy driver is installed for controlling the DMA in the FPGA and enables its usage via the `DMA_Signal_Source_FPGA` source. Requires `-DENABLE_FPGA=ON`. <span style="color: orange">This configuration option is only present in the `next` branch of the upstream repository and it will be present in the next stable release.</span> |
 | `-DENABLE_OPENCL`            |    `ON` / `OFF`     |    `OFF`    | If set to `ON`, it enables the building of processing blocks implemented with OpenCL (experimental). Specifically, the `GPS_L1_CA_PCPS_OpenCl_Acquisition` implementation of an [Acquisition]({{ "/docs/sp-blocks/acquisition" | relative_url }}) block becomes available. This option requires the [OpenCL library](https://www.khronos.org/opencl/) and a compatible Graphic Processing Unit (GPU).           |
 | `-DENABLE_CUDA`              |    `ON` / `OFF`     |    `OFF`    | If set to `ON`, it enables the building of processing blocks implemented with CUDA (experimental). Specifically, the `GPS_L1_CA_DLL_PLL_Tracking_GPU` implementation of a [Tracking]({{ "/docs/sp-blocks/tracking" | relative_url }}) block becomes available. This option requires the [CUDA Toolkit](https://developer.nvidia.com/cuda-downloads) and a compatible Graphic Processing Unit (GPU). |
 | `-DENABLE_PROFILING`         |    `ON` / `OFF`     |    `OFF`    | If set to `ON`, it enables  automatic execution of `volk_gnsssdr_profile` at the end of the building process. This program tests all known [VOLK_GNSSSDR](https://github.com/gnss-sdr/gnss-sdr/tree/main/src/algorithms/libs/volk_gnsssdr_module/volk_gnsssdr) kernels (that is, basic processing components like adders, multipliers, correlators, and much more) for each SIMD architecture supported by the host machine, measuring their performance. When finished, the profiler writes to `$HOME/.volk_gnsssdr/volk_gnsssdr_config` the fastest implementation for each VOLK_GNSSSDR function. This file is read when using a function to know the best version to execute. |