Adding linting checks and cleaning all files

.github/workflows/linting.yml

@@ -29,4 +29,16 @@ jobs:
           submodules: 'recursive'
       - name: Lint with flake8
         run: |
-          make lint
+          make lint_python
+
+  lint_ruby:
+    runs-on: ubuntu-latest
+    strategy:
+      max-parallel: 12
+    steps:
+      - uses: actions/checkout@v3
+        with:
+          submodules: 'recursive'
+      - name: Lint with rubocop
+        run: |
+          make lint_ruby

.rubocop.yml

@@ -0,0 +1,45 @@
+# The behavior of RuboCop can be controlled via the .rubocop.yml
+# configuration file. It makes it possible to enable/disable
+# certain cops (checks) and to alter their behavior if they accept
+# any parameters. The file can be placed either in your home
+# directory or in some project directory.
+#
+# RuboCop will start looking for the configuration file in the directory
+# where the inspected file is and continue its way up to the root directory.
+#
+# See https://docs.rubocop.org/rubocop/configuration
+
+Style/FrozenStringLiteralComment:
+  Enabled: false
+
+GlobalVars:
+  Description: Do not introduce global variables.
+  Enabled: false
+
+UselessAssignment:
+  Description: Useless assignment to variable.
+  Enabled: false
+
+Metrics/AbcSize:
+  Description: Assignment Branch Condition size for conn_space is too high.
+  Enabled: false
+
+Metrics/MethodLength:
+  Description: Method has too many lines.
+  Enabled: false
+
+RSpec/VariableName:
+  Description: Use snake_case for variable names.
+  EnforcedStyle: "snake_case"
+  Enabled: false
+
+Metrics/BlockNesting:
+  Description:  Avoid more than 3 levels of block nesting.
+  Enabled: false
+
+AllCops:
+  Exclude:
+    - 'env/**/*'
+  Include:
+    - '**/*.rb'
+    - '**/*.drc'

Makefile

@@ -25,12 +25,22 @@ ENVIRONMENT_FILE := pdk_regression.yml
 # Path to regression
 KLAYOUT_TESTS := klayout/drc/testing/
 
+
 include third_party/make-env/conda.mk
 
 # Lint python code
-lint: | $(CONDA_ENV_PYTHON)
+lint_python: | $(CONDA_ENV_PYTHON)
 	@$(IN_CONDA_ENV) flake8 .
 
+# Lint ruby code
+lint_ruby:| $(CONDA_ENV_PYTHON)
+	@$(IN_CONDA_ENV) gem install rubocop
+	@$(IN_CONDA_ENV) rubocop=`which rubocop`
+	@$(IN_CONDA_ENV) rubocop_dir=`dirname $$rubocop`
+	@$(IN_CONDA_ENV) echo $$rubocop_dir
+	@$(IN_CONDA_ENV) ln -s ../../../bin/ruby $$rubocop_dir/ruby
+	@$(IN_CONDA_ENV) rubocop .
+
 ################################################################################
 ## DRC Regression section
 ################################################################################

klayout/drc/rule_decks/drc_bjt.drc

@@ -14,28 +14,28 @@
 # limitations under the License.
 ################################################################################################
 
-
 if FEOL
-    #================================================
-    #--------------------DRC_BJT---------------------
-    #================================================
-
-    # Rule BJT.1: Min. DRC_BJT overlap of DNWELL for NPN BJT.
-    logger.info("Executing rule BJT.1")
-    bjt1_l1 = dnwell.interacting(drc_bjt).not(dnwell.inside(drc_bjt))
-    bjt1_l1.output("BJT.1", "BJT.1 : Min. DRC_BJT overlap of DNWELL for NPN BJT.")
-    bjt1_l1.forget
+  #================================================
+  #--------------------DRC_BJT---------------------
+  #================================================
 
-    # Rule BJT.2: Min. DRC_BJT overlap of PCOM in Psub.
-    logger.info("Executing rule BJT.2")
-    bjt2_l1 = pcomp.outside(nwell).outside(dnwell).interacting(drc_bjt).not(pcomp.outside(nwell).outside(dnwell).inside(drc_bjt))
-    bjt2_l1.output("BJT.2", "BJT.2 : Min. DRC_BJT overlap of PCOM in Psub.")
-    bjt2_l1.forget
+  # Rule BJT.1: Min. DRC_BJT overlap of DNWELL for NPN BJT.
+  logger.info('Executing rule BJT.1')
+  bjt1_l1 = dnwell.interacting(drc_bjt).not(dnwell.inside(drc_bjt))
+  bjt1_l1.output('BJT.1', 'BJT.1 : Min. DRC_BJT overlap of DNWELL for NPN BJT.')
+  bjt1_l1.forget
 
-    # Rule BJT.3: Minimum space of DRC_BJT layer to unrelated COMP. is 0.1µm
-    logger.info("Executing rule BJT.3")
-    bjt3_l1  = comp.outside(drc_bjt).separation(drc_bjt, 0.1.um, euclidian).polygons(0.001)
-    bjt3_l1.output("BJT.3", "BJT.3 : Minimum space of DRC_BJT layer to unrelated COMP. : 0.1µm")
-    bjt3_l1.forget
-end #FEOL
+  # Rule BJT.2: Min. DRC_BJT overlap of PCOM in Psub.
+  logger.info('Executing rule BJT.2')
+  bjt2_l1 = pcomp.outside(nwell).outside(dnwell).interacting(drc_bjt)
+                 .not(pcomp.outside(nwell)
+                 .outside(dnwell).inside(drc_bjt))
+  bjt2_l1.output('BJT.2', 'BJT.2 : Min. DRC_BJT overlap of PCOM in Psub.')
+  bjt2_l1.forget
 
+  # Rule BJT.3: Minimum space of DRC_BJT layer to unrelated COMP. is 0.1µm
+  logger.info('Executing rule BJT.3')
+  bjt3_l1 = comp.outside(drc_bjt).separation(drc_bjt, 0.1.um, euclidian).polygons(0.001)
+  bjt3_l1.output('BJT.3', 'BJT.3 : Minimum space of DRC_BJT layer to unrelated COMP. : 0.1µm')
+  bjt3_l1.forget
+end

klayout/drc/rule_decks/dualgate.drc

@@ -15,74 +15,73 @@
 ################################################################################################
 
 if FEOL
-    #================================================
-    #--------------------DUALGATE--------------------
-    #================================================
+  #================================================
+  #--------------------DUALGATE--------------------
+  #================================================
 
-    # Rule DV.1: Min. Dualgate enclose DNWELL. is 0.5µm
-    logger.info("Executing rule DV.1")
-    dv1_l1 = dualgate.enclosing(dnwell, 0.5.um, euclidian).polygons(0.001)
-    dv1_l2 = dnwell.not_outside(dualgate).not(dualgate)
-    dv1_l  = dv1_l1.or(dv1_l2)
-    dv1_l.output("DV.1", "DV.1 : Min. Dualgate enclose DNWELL. : 0.5µm")
-    dv1_l1.forget
-    dv1_l2.forget
-    dv1_l.forget
+  # Rule DV.1: Min. Dualgate enclose DNWELL. is 0.5µm
+  logger.info('Executing rule DV.1')
+  dv1_l1 = dualgate.enclosing(dnwell, 0.5.um, euclidian).polygons(0.001)
+  dv1_l2 = dnwell.not_outside(dualgate).not(dualgate)
+  dv1_l  = dv1_l1.or(dv1_l2)
+  dv1_l.output('DV.1', 'DV.1 : Min. Dualgate enclose DNWELL. : 0.5µm')
+  dv1_l1.forget
+  dv1_l2.forget
+  dv1_l.forget
 
-    # Rule DV.2: Min. Dualgate Space. Merge if Space is less than this design rule. is 0.44µm
-    logger.info("Executing rule DV.2")
-    dv2_l1  = dualgate.space(0.44.um, euclidian).polygons(0.001)
-    dv2_l1.output("DV.2", "DV.2 : Min. Dualgate Space. Merge if Space is less than this design rule. : 0.44µm")
-    dv2_l1.forget
+  # Rule DV.2: Min. Dualgate Space. Merge if Space is less than this design rule. is 0.44µm
+  logger.info('Executing rule DV.2')
+  dv2_l1 = dualgate.space(0.44.um, euclidian).polygons(0.001)
+  dv2_l1.output('DV.2', 'DV.2 : Min. Dualgate Space. Merge if Space is less than this design rule. : 0.44µm')
+  dv2_l1.forget
 
-    # Rule DV.3: Min. Dualgate to COMP space [unrelated]. is 0.24µm
-    logger.info("Executing rule DV.3")
-    dv3_l1  = dualgate.separation(comp.outside(dualgate), 0.24.um, euclidian).polygons(0.001)
-    dv3_l1.output("DV.3", "DV.3 : Min. Dualgate to COMP space [unrelated]. : 0.24µm")
-    dv3_l1.forget
+  # Rule DV.3: Min. Dualgate to COMP space [unrelated]. is 0.24µm
+  logger.info('Executing rule DV.3')
+  dv3_l1 = dualgate.separation(comp.outside(dualgate), 0.24.um, euclidian).polygons(0.001)
+  dv3_l1.output('DV.3', 'DV.3 : Min. Dualgate to COMP space [unrelated]. : 0.24µm')
+  dv3_l1.forget
 
-    # rule DV.4 is not a DRC check
-    # Refer to: https://gf180mcu-pdk.readthedocs.io/en/latest/physical_verification/design_manual/drm_07_07.html
+  # rule DV.4 is not a DRC check
+  # Refer to: https://gf180mcu-pdk.readthedocs.io/en/latest/physical_verification/design_manual/drm_07_07.html
 
-    # Rule DV.5: Min. Dualgate width. is 0.7µm
-    logger.info("Executing rule DV.5")
-    dv5_l1  = dualgate.width(0.7.um, euclidian).polygons(0.001)
-    dv5_l1.output("DV.5", "DV.5 : Min. Dualgate width. : 0.7µm")
-    dv5_l1.forget
+  # Rule DV.5: Min. Dualgate width. is 0.7µm
+  logger.info('Executing rule DV.5')
+  dv5_l1 = dualgate.width(0.7.um, euclidian).polygons(0.001)
+  dv5_l1.output('DV.5', 'DV.5 : Min. Dualgate width. : 0.7µm')
+  dv5_l1.forget
 
-    comp_dv = comp.not(pcomp.outside(nwell))
-    # Rule DV.6: Min. Dualgate enclose COMP (except substrate tap). is 0.24µm
-    logger.info("Executing rule DV.6")
-    dv6_l1 = dualgate.enclosing(comp_dv, 0.24.um, euclidian).polygons(0.001)
-    dv6_l2 = comp_dv.not_outside(dualgate).not(dualgate)
-    dv6_l  = dv6_l1.or(dv6_l2)
-    dv6_l.output("DV.6", "DV.6 : Min. Dualgate enclose COMP (except substrate tap). : 0.24µm")
-    dv6_l1.forget
-    dv6_l2.forget
-    dv6_l.forget
+  comp_dv = comp.not(pcomp.outside(nwell))
+  # Rule DV.6: Min. Dualgate enclose COMP (except substrate tap). is 0.24µm
+  logger.info('Executing rule DV.6')
+  dv6_l1 = dualgate.enclosing(comp_dv, 0.24.um, euclidian).polygons(0.001)
+  dv6_l2 = comp_dv.not_outside(dualgate).not(dualgate)
+  dv6_l  = dv6_l1.or(dv6_l2)
+  dv6_l.output('DV.6', 'DV.6 : Min. Dualgate enclose COMP (except substrate tap). : 0.24µm')
+  dv6_l1.forget
+  dv6_l2.forget
+  dv6_l.forget
 
-    # Rule DV.7: COMP (except substrate tap) can not be partially overlapped by Dualgate.
-    logger.info("Executing rule DV.7")
-    dv7_l1 = dualgate.not_outside(comp_dv).not(dualgate.covering(comp_dv))
-    dv7_l1.output("DV.7", "DV.7 : COMP (except substrate tap) can not be partially overlapped by Dualgate.")
-    dv7_l1.forget
+  # Rule DV.7: COMP (except substrate tap) can not be partially overlapped by Dualgate.
+  logger.info('Executing rule DV.7')
+  dv7_l1 = dualgate.not_outside(comp_dv).not(dualgate.covering(comp_dv))
+  dv7_l1.output('DV.7', 'DV.7 : COMP (except substrate tap) can not be partially overlapped by Dualgate.')
+  dv7_l1.forget
 
-    comp_dv.forget
+  comp_dv.forget
 
-    # Rule DV.8: Min Dualgate enclose Poly2. is 0.4µm
-    logger.info("Executing rule DV.8")
-    dv8_l1 = dualgate.enclosing(poly2, 0.4.um, euclidian).polygons(0.001)
-    dv8_l2 = poly2.not_outside(dualgate).not(dualgate)
-    dv8_l  = dv8_l1.or(dv8_l2)
-    dv8_l.output("DV.8", "DV.8 : Min Dualgate enclose Poly2. : 0.4µm")
-    dv8_l1.forget
-    dv8_l2.forget
-    dv8_l.forget
-
-    # Rule DV.9: 3.3V and 5V/6V PMOS cannot be sitting inside same NWELL.
-    logger.info("Executing rule DV.9")
-    dv9_l1 = nwell.covering(pgate.and(dualgate)).covering(pgate.not_inside(v5_xtor).not_inside(dualgate))
-    dv9_l1.output("DV.9", "DV.9 : 3.3V and 5V/6V PMOS cannot be sitting inside same NWELL.")
-    dv9_l1.forget
-end #FEOL
+  # Rule DV.8: Min Dualgate enclose Poly2. is 0.4µm
+  logger.info('Executing rule DV.8')
+  dv8_l1 = dualgate.enclosing(poly2, 0.4.um, euclidian).polygons(0.001)
+  dv8_l2 = poly2.not_outside(dualgate).not(dualgate)
+  dv8_l  = dv8_l1.or(dv8_l2)
+  dv8_l.output('DV.8', 'DV.8 : Min Dualgate enclose Poly2. : 0.4µm')
+  dv8_l1.forget
+  dv8_l2.forget
+  dv8_l.forget
 
+  # Rule DV.9: 3.3V and 5V/6V PMOS cannot be sitting inside same NWELL.
+  logger.info('Executing rule DV.9')
+  dv9_l1 = nwell.covering(pgate.and(dualgate)).covering(pgate.not_inside(v5_xtor).not_inside(dualgate))
+  dv9_l1.output('DV.9', 'DV.9 : 3.3V and 5V/6V PMOS cannot be sitting inside same NWELL.')
+  dv9_l1.forget
+end

klayout/drc/rule_decks/dummy_exclude.drc

@@ -22,22 +22,21 @@
 ## Please refer to https://gf180mcu-pdk.readthedocs.io/en/latest/physical_verification/design_manual/drm_10_08.html#design-rules-for-dummy-exclude-layers-ndmy-and-pmndmy
 
 # Rule DE.2: Minimum NDMY or PMNDMY size (x or y dimension in um). is 0.8µm
-logger.info("Executing rule DE.2")
-de2_l1  = ndmy.or(pmndmy).width(0.8.um, euclidian)
-de2_l1.output("DE.2", "DE.2 : Minimum NDMY or PMNDMY size (x or y dimension in um). : 0.8µm")
+logger.info('Executing rule DE.2')
+de2_l1 = ndmy.or(pmndmy).width(0.8.um, euclidian)
+de2_l1.output('DE.2', 'DE.2 : Minimum NDMY or PMNDMY size (x or y dimension in um). : 0.8µm')
 de2_l1.forget
 
 # Rule DE.3: If size greater than 15000 um2 then two sides should not be greater than (80 um).
-logger.info("Executing rule DE.3")
-de3_ndmy_area = ndmy.with_area(15000.um, nil)
+logger.info('Executing rule DE.3')
+de3_ndmy_area = ndmy.with_area(15_000.um, nil)
 de3_l1 = de3_ndmy_area.edges.with_length(80.001.um, nil)
-de3_l1.output("DE.3", "DE.3 : If size greater than 15000 um2 then two sides should not be greater than (80 um).")
+de3_l1.output('DE.3', 'DE.3 : If size greater than 15000 um2 then two sides should not be greater than (80 um).')
 de3_l1.forget
 de3_ndmy_area.forget
 
 # Rule DE.4: Minimum NDMY to NDMY space (Merge if space is less). is 20µm
-logger.info("Executing rule DE.4")
-de4_l1  = ndmy.space(20.um, euclidian)
-de4_l1.output("DE.4", "DE.4 : Minimum NDMY to NDMY space (Merge if space is less). : 20µm")
+logger.info('Executing rule DE.4')
+de4_l1 = ndmy.space(20.um, euclidian)
+de4_l1.output('DE.4', 'DE.4 : Minimum NDMY to NDMY space (Merge if space is less). : 20µm')
 de4_l1.forget
-