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Adding SRAM3p3 table for GF180MCU DRC #61

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merged 1 commit into from
Apr 6, 2023

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FaragElsayed2
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Adding SRAM3p3 table for GF180MCU DRC

Fixes #43

@mithro mithro assigned proppy and unassigned proppy Apr 3, 2023
@mithro mithro requested a review from proppy April 3, 2023 17:32
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proppy commented Apr 4, 2023

@atorkmabrains can you review it first?

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@proppy responded #65

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# limitations under the License.
################################################################################################

if FEOL
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#58 but not blocking

if FEOL

#================================================
#-------------------3.3V SRAM--------------------
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#57 but not blocking

sdf4c_l1.forget
sdf4c_l2.forget
sdf4c_l.forget
pcomp_out_dn_sram.forget
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#53 but not blocking

# Rule S.DF.4c_LV: Min. (Nwell overlap of PCOMP) outside DNWELL is 0.4µm.
logger.info('Executing rule S.DF.4c_LV')
pcomp_out_dn_sram = pcomp.outside(dnwell).and(sram_lv)
sdf4c_l1 = pcomp_out_dn_sram.enclosed(nw_n_dn_sram, 0.4.um, euclidian).polygons(0.001.um)
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why do we have .001 here?

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filed #66 to discuss this further


# Rule S.CO.3_LV: Poly2 overlap of contact is 0.04µm.
logger.info('Executing rule S.CO.3_LV')
sco3_l1 = contact_sram.enclosed(poly_sram, 0.04.um, euclidian).polygons(0.001.um)
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why do we have .001 here?

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filed #66 to discuss this further


# Rule S.CO.4_LV: COMP overlap of contact is 0.03µm.
logger.info('Executing rule S.CO.4_LV')
sco4_l1 = comp_sram.enclosing(contact_sram, 0.03.um, euclidian).polygons(0.001.um)
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why do we have .001 here?

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filed #66 to discuss this further

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just some nits and questions but nothing blocking per se, I'll leave it up to you if you want to address those in this PR or file separate issues to track them.

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@proppy I have answered all your questions in other PRs.

@proppy proppy merged commit f4f96e5 into google:main Apr 6, 2023
@atorkmabrains atorkmabrains deleted the sram3p3_google branch April 6, 2023 10:55
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Creating PRs for each DRC table separately
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