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code review: dma refactor
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Pierre Guillod committed Nov 29, 2023
1 parent c3e8751 commit 3b20b8e
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Showing 9 changed files with 134 additions and 146 deletions.
8 changes: 4 additions & 4 deletions hw/core-v-mini-mcu/ao_peripheral_subsystem.sv
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Original file line number Diff line number Diff line change
Expand Up @@ -82,8 +82,8 @@ module ao_peripheral_subsystem
input obi_resp_t dma_read_ch0_resp_i,
output obi_req_t dma_write_ch0_req_o,
input obi_resp_t dma_write_ch0_resp_i,
output obi_req_t dma_addr_ch0_req_o,
input obi_resp_t dma_addr_ch0_resp_i,
output obi_req_t dma_addr_bcst_ch0_req_o,
input obi_resp_t dma_addr_bcst_ch0_resp_i,
output logic dma_done_intr_o,
output logic dma_window_intr_o,

Expand Down Expand Up @@ -392,8 +392,8 @@ module ao_peripheral_subsystem
.dma_read_ch0_resp_i,
.dma_write_ch0_req_o,
.dma_write_ch0_resp_i,
.dma_addr_ch0_req_o,
.dma_addr_ch0_resp_i,
.dma_addr_bcst_ch0_req_o,
.dma_addr_bcst_ch0_resp_i,
.trigger_slot_i(dma_trigger_slots),
.dma_done_intr_o(dma_done_intr_o),
.dma_window_intr_o(dma_window_intr_o)
Expand Down
20 changes: 10 additions & 10 deletions hw/core-v-mini-mcu/core_v_mini_mcu.sv
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Original file line number Diff line number Diff line change
Expand Up @@ -294,8 +294,8 @@ module core_v_mini_mcu
input obi_resp_t ext_dma_read_ch0_resp_i,
output obi_req_t ext_dma_write_ch0_req_o,
input obi_resp_t ext_dma_write_ch0_resp_i,
output obi_req_t ext_dma_addr_ch0_req_o,
input obi_resp_t ext_dma_addr_ch0_resp_i,
output obi_req_t ext_dma_addr_bcst_ch0_req_o,
input obi_resp_t ext_dma_addr_bcst_ch0_resp_i,

output reg_req_t ext_peripheral_slave_req_o,
input reg_rsp_t ext_peripheral_slave_resp_i,
Expand Down Expand Up @@ -349,8 +349,8 @@ module core_v_mini_mcu
obi_resp_t dma_read_ch0_resp;
obi_req_t dma_write_ch0_req;
obi_resp_t dma_write_ch0_resp;
obi_req_t dma_addr_ch0_req;
obi_resp_t dma_addr_ch0_resp;
obi_req_t dma_addr_bcst_ch0_req;
obi_resp_t dma_addr_bcst_ch0_resp;

// ram signals
obi_req_t [core_v_mini_mcu_pkg::NUM_BANKS-1:0] ram_slave_req;
Expand Down Expand Up @@ -510,8 +510,8 @@ module core_v_mini_mcu
.dma_read_ch0_resp_o(dma_read_ch0_resp),
.dma_write_ch0_req_i(dma_write_ch0_req),
.dma_write_ch0_resp_o(dma_write_ch0_resp),
.dma_addr_ch0_req_i(dma_addr_ch0_req),
.dma_addr_ch0_resp_o(dma_addr_ch0_resp),
.dma_addr_bcst_ch0_req_i(dma_addr_bcst_ch0_req),
.dma_addr_bcst_ch0_resp_o(dma_addr_bcst_ch0_resp),
.ext_xbar_master_req_i(ext_xbar_master_req_i),
.ext_xbar_master_resp_o(ext_xbar_master_resp_o),
.ram_req_o(ram_slave_req),
Expand All @@ -534,8 +534,8 @@ module core_v_mini_mcu
.ext_dma_read_ch0_resp_i(ext_dma_read_ch0_resp_i),
.ext_dma_write_ch0_req_o(ext_dma_write_ch0_req_o),
.ext_dma_write_ch0_resp_i(ext_dma_write_ch0_resp_i),
.ext_dma_addr_ch0_req_o(ext_dma_addr_ch0_req_o),
.ext_dma_addr_ch0_resp_i(ext_dma_addr_ch0_resp_i)
.ext_dma_addr_bcst_ch0_req_o(ext_dma_addr_bcst_ch0_req_o),
.ext_dma_addr_bcst_ch0_resp_i(ext_dma_addr_bcst_ch0_resp_i)
);

memory_subsystem #(
Expand Down Expand Up @@ -605,8 +605,8 @@ module core_v_mini_mcu
.dma_read_ch0_resp_i(dma_read_ch0_resp),
.dma_write_ch0_req_o(dma_write_ch0_req),
.dma_write_ch0_resp_i(dma_write_ch0_resp),
.dma_addr_ch0_req_o(dma_addr_ch0_req),
.dma_addr_ch0_resp_i(dma_addr_ch0_resp),
.dma_addr_bcst_ch0_req_o(dma_addr_bcst_ch0_req),
.dma_addr_bcst_ch0_resp_i(dma_addr_bcst_ch0_resp),
.dma_done_intr_o(dma_done_intr),
.dma_window_intr_o(dma_window_intr),
.spi_intr_event_o(spi_intr),
Expand Down
20 changes: 10 additions & 10 deletions hw/core-v-mini-mcu/core_v_mini_mcu.sv.tpl
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Original file line number Diff line number Diff line change
Expand Up @@ -48,8 +48,8 @@ ${pad.core_v_mini_mcu_interface}
input obi_resp_t ext_dma_read_ch0_resp_i,
output obi_req_t ext_dma_write_ch0_req_o,
input obi_resp_t ext_dma_write_ch0_resp_i,
output obi_req_t ext_dma_addr_ch0_req_o,
input obi_resp_t ext_dma_addr_ch0_resp_i,
output obi_req_t ext_dma_addr_bcst_ch0_req_o,
input obi_resp_t ext_dma_addr_bcst_ch0_resp_i,

output reg_req_t ext_peripheral_slave_req_o,
input reg_rsp_t ext_peripheral_slave_resp_i,
Expand Down Expand Up @@ -103,8 +103,8 @@ ${pad.core_v_mini_mcu_interface}
obi_resp_t dma_read_ch0_resp;
obi_req_t dma_write_ch0_req;
obi_resp_t dma_write_ch0_resp;
obi_req_t dma_addr_ch0_req;
obi_resp_t dma_addr_ch0_resp;
obi_req_t dma_addr_bcst_ch0_req;
obi_resp_t dma_addr_bcst_ch0_resp;

// ram signals
obi_req_t [core_v_mini_mcu_pkg::NUM_BANKS-1:0] ram_slave_req;
Expand Down Expand Up @@ -264,8 +264,8 @@ ${pad.core_v_mini_mcu_interface}
.dma_read_ch0_resp_o(dma_read_ch0_resp),
.dma_write_ch0_req_i(dma_write_ch0_req),
.dma_write_ch0_resp_o(dma_write_ch0_resp),
.dma_addr_ch0_req_i(dma_addr_ch0_req),
.dma_addr_ch0_resp_o(dma_addr_ch0_resp),
.dma_addr_bcst_ch0_req_i(dma_addr_bcst_ch0_req),
.dma_addr_bcst_ch0_resp_o(dma_addr_bcst_ch0_resp),
.ext_xbar_master_req_i(ext_xbar_master_req_i),
.ext_xbar_master_resp_o(ext_xbar_master_resp_o),
.ram_req_o(ram_slave_req),
Expand All @@ -288,8 +288,8 @@ ${pad.core_v_mini_mcu_interface}
.ext_dma_read_ch0_resp_i(ext_dma_read_ch0_resp_i),
.ext_dma_write_ch0_req_o(ext_dma_write_ch0_req_o),
.ext_dma_write_ch0_resp_i(ext_dma_write_ch0_resp_i),
.ext_dma_addr_ch0_req_o(ext_dma_addr_ch0_req_o),
.ext_dma_addr_ch0_resp_i(ext_dma_addr_ch0_resp_i)
.ext_dma_addr_bcst_ch0_req_o(ext_dma_addr_bcst_ch0_req_o),
.ext_dma_addr_bcst_ch0_resp_i(ext_dma_addr_bcst_ch0_resp_i)
);

memory_subsystem #(
Expand Down Expand Up @@ -357,8 +357,8 @@ ${pad.core_v_mini_mcu_interface}
.dma_read_ch0_resp_i(dma_read_ch0_resp),
.dma_write_ch0_req_o(dma_write_ch0_req),
.dma_write_ch0_resp_i(dma_write_ch0_resp),
.dma_addr_ch0_req_o(dma_addr_ch0_req),
.dma_addr_ch0_resp_i(dma_addr_ch0_resp),
.dma_addr_bcst_ch0_req_o(dma_addr_bcst_ch0_req),
.dma_addr_bcst_ch0_resp_i(dma_addr_bcst_ch0_resp),
.dma_done_intr_o(dma_done_intr),
.dma_window_intr_o(dma_window_intr),
.spi_intr_event_o(spi_intr),
Expand Down
2 changes: 1 addition & 1 deletion hw/core-v-mini-mcu/include/core_v_mini_mcu_pkg.sv.tpl
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Original file line number Diff line number Diff line change
Expand Up @@ -39,7 +39,7 @@ package core_v_mini_mcu_pkg;
localparam logic [31:0] DEBUG_MASTER_IDX = 2;
localparam logic [31:0] DMA_READ_CH0_IDX = 3;
localparam logic [31:0] DMA_WRITE_CH0_IDX = 4;
localparam logic [31:0] DMA_ADDR_CH0_IDX = 5;
localparam logic [31:0] DMA_ADDR_BCST_CH0_IDX = 5;

localparam SYSTEM_XBAR_NMASTER = 6;

Expand Down
16 changes: 8 additions & 8 deletions hw/core-v-mini-mcu/system_bus.sv.tpl
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Original file line number Diff line number Diff line change
Expand Up @@ -43,8 +43,8 @@ module system_bus
input obi_req_t dma_write_ch0_req_i,
output obi_resp_t dma_write_ch0_resp_o,

input obi_req_t dma_addr_ch0_req_i,
output obi_resp_t dma_addr_ch0_resp_o,
input obi_req_t dma_addr_bcst_ch0_req_i,
output obi_resp_t dma_addr_bcst_ch0_resp_o,

// External master ports
input obi_req_t [EXT_XBAR_NMASTER_RND-1:0] ext_xbar_master_req_i,
Expand Down Expand Up @@ -82,8 +82,8 @@ module system_bus
output obi_req_t ext_dma_write_ch0_req_o,
input obi_resp_t ext_dma_write_ch0_resp_i,

output obi_req_t ext_dma_addr_ch0_req_o,
input obi_resp_t ext_dma_addr_ch0_resp_i
output obi_req_t ext_dma_addr_bcst_ch0_req_o,
input obi_resp_t ext_dma_addr_bcst_ch0_resp_i
);

import core_v_mini_mcu_pkg::*;
Expand Down Expand Up @@ -121,7 +121,7 @@ module system_bus
assign int_master_req[core_v_mini_mcu_pkg::DEBUG_MASTER_IDX] = debug_master_req_i;
assign int_master_req[core_v_mini_mcu_pkg::DMA_READ_CH0_IDX] = dma_read_ch0_req_i;
assign int_master_req[core_v_mini_mcu_pkg::DMA_WRITE_CH0_IDX] = dma_write_ch0_req_i;
assign int_master_req[core_v_mini_mcu_pkg::DMA_ADDR_CH0_IDX] = dma_addr_ch0_req_i;
assign int_master_req[core_v_mini_mcu_pkg::DMA_ADDR_BCST_CH0_IDX] = dma_addr_bcst_ch0_req_i;

// Internal + external master requests
generate
Expand All @@ -144,7 +144,7 @@ module system_bus
assign debug_master_resp_o = int_master_resp[core_v_mini_mcu_pkg::DEBUG_MASTER_IDX];
assign dma_read_ch0_resp_o = int_master_resp[core_v_mini_mcu_pkg::DMA_READ_CH0_IDX];
assign dma_write_ch0_resp_o = int_master_resp[core_v_mini_mcu_pkg::DMA_WRITE_CH0_IDX];
assign dma_addr_ch0_resp_o = int_master_resp[core_v_mini_mcu_pkg::DMA_ADDR_CH0_IDX];
assign dma_addr_bcst_ch0_resp_o = int_master_resp[core_v_mini_mcu_pkg::DMA_ADDR_BCST_CH0_IDX];

// External master responses
if (EXT_XBAR_NMASTER == 0) begin
Expand All @@ -171,7 +171,7 @@ module system_bus
assign ext_debug_master_req_o = demux_xbar_req[DEBUG_MASTER_IDX][DEMUX_XBAR_EXT_SLAVE_IDX];
assign ext_dma_read_ch0_req_o = demux_xbar_req[DMA_READ_CH0_IDX][DEMUX_XBAR_EXT_SLAVE_IDX];
assign ext_dma_write_ch0_req_o = demux_xbar_req[DMA_WRITE_CH0_IDX][DEMUX_XBAR_EXT_SLAVE_IDX];
assign ext_dma_addr_ch0_req_o = demux_xbar_req[DMA_ADDR_CH0_IDX][DEMUX_XBAR_EXT_SLAVE_IDX];
assign ext_dma_addr_bcst_ch0_req_o = demux_xbar_req[DMA_ADDR_BCST_CH0_IDX][DEMUX_XBAR_EXT_SLAVE_IDX];

// Internal slave responses
assign int_slave_resp[core_v_mini_mcu_pkg::ERROR_IDX] = error_slave_resp;
Expand All @@ -189,7 +189,7 @@ module system_bus
assign demux_xbar_resp[DEBUG_MASTER_IDX][DEMUX_XBAR_EXT_SLAVE_IDX] = ext_debug_master_resp_i;
assign demux_xbar_resp[DMA_READ_CH0_IDX][DEMUX_XBAR_EXT_SLAVE_IDX] = ext_dma_read_ch0_resp_i;
assign demux_xbar_resp[DMA_WRITE_CH0_IDX][DEMUX_XBAR_EXT_SLAVE_IDX] = ext_dma_write_ch0_resp_i;
assign demux_xbar_resp[DMA_ADDR_CH0_IDX][DEMUX_XBAR_EXT_SLAVE_IDX] = ext_dma_addr_ch0_resp_i;
assign demux_xbar_resp[DMA_ADDR_BCST_CH0_IDX][DEMUX_XBAR_EXT_SLAVE_IDX] = ext_dma_addr_bcst_ch0_resp_i;

`ifndef SYNTHESIS
always_ff @(posedge clk_i, negedge rst_ni) begin : check_out_of_bound
Expand Down
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