merge examples

sw/applications/example_iffifo_dma/main.c → sw/applications/example_iffifo/main.c

@@ -19,13 +19,16 @@
 #include "csr.h"
 #include "hart.h"
 
+#include "rv_plic.h"
+
 #include "dma.h"
 #include "dma_regs.h"
 #include "fast_intr_ctrl.h"
 
 
 #define PRINTF(fmt, ...)    printf(fmt, ## __VA_ARGS__)
 
+unsigned int IFFIFO_START_ADDRESS = EXT_PERIPHERAL_START_ADDRESS + 0x2000;
 
 int32_t to_fifo  [6]   __attribute__ ((aligned (4)))  = { 1, 2, 3, 4, 5, 6 };
 int32_t from_fifo[4]   __attribute__ ((aligned (4)))  = { 0, 0, 0, 0 };
@@ -43,6 +46,15 @@ void protected_wait_for_dma_interrupt(void)
   enable_all_fast_interrupts(true);
 }
 
+iffifo_intr_flag = 0;
+void handler_irq_iffifo(uint32_t id)    
+{
+  mmio_region_t iffifo_base_addr = mmio_region_from_addr((uintptr_t)IFFIFO_START_ADDRESS);
+  mmio_region_write32(iffifo_base_addr, IFFIFO_INTERRUPTS_REG_OFFSET, 0b0);
+  iffifo_intr_flag = 1;
+  PRINTF(" ** REACH intr. fired.\n");
+}
+
 static dma_target_t tgt_src;
 static dma_target_t tgt_dst;
 static dma_trans_t trans;
@@ -59,12 +71,36 @@ int compare_print_fifo_array(void) {
   return errors;
 }
 
-int main(int argc, char *argv[]) {
+void print_status_register(void)
+{
+  mmio_region_t iffifo_base_addr = mmio_region_from_addr((uintptr_t)IFFIFO_START_ADDRESS);
+  int32_t status = mmio_region_read32(iffifo_base_addr, IFFIFO_STATUS_REG_OFFSET);
+  PRINTF("STATUS = ");
+  PRINTF(status & 1 ? "E" : "-"); // FIFO empty
+  PRINTF(status & 2 ? "A" : "-"); // Data available in FIFO
+  PRINTF(status & 4 ? "R" : "-"); // Watermark reached
+  PRINTF(status & 8 ? "F" : "-"); // FIFO full
+  PRINTF("\n");
+}
 
+int main(int argc, char *argv[]) {
 
-    unsigned int IFFIFO_START_ADDRESS = EXT_PERIPHERAL_START_ADDRESS + 0x2000;
     mmio_region_t iffifo_base_addr = mmio_region_from_addr((uintptr_t)IFFIFO_START_ADDRESS);
 
+    // Enable interrupt on processor side
+    // Enable global interrupt for machine-level interrupts
+    CSR_SET_BITS(CSR_REG_MSTATUS, 0x8);
+    // Set mie.MEIE bit to one to enable machine-level external interrupts
+    const uint32_t mask = 1 << 11;
+    CSR_SET_BITS(CSR_REG_MIE, mask);
+
+    if(plic_Init()) {return EXIT_FAILURE;};
+    if(plic_irq_set_priority(EXT_INTR_1, 1)) {return EXIT_FAILURE;};
+    if(plic_irq_set_enabled(EXT_INTR_1, kPlicToggleEnabled)) {return EXIT_FAILURE;};
+
+    mmio_region_write32(iffifo_base_addr, IFFIFO_WATERMARK_REG_OFFSET, 2);
+    mmio_region_write32(iffifo_base_addr, IFFIFO_INTERRUPTS_REG_OFFSET, 0b1);
+
     dma_config_flags_t ret;
 
      // -- DMA CONFIGURATION --
@@ -92,12 +128,16 @@ int main(int argc, char *argv[]) {
 
     if (compare_print_fifo_array() != 4) {return EXIT_FAILURE;}
 
+    print_status_register();
+
     PRINTF("Launch MM -> Stream DMA\n");
     dma_launch( &trans );
 
     int32_t read0 = mmio_region_read32(iffifo_base_addr, IFFIFO_FIFO_OUT_REG_OFFSET);
     int32_t read1 = mmio_region_read32(iffifo_base_addr, IFFIFO_FIFO_OUT_REG_OFFSET);
 
+    print_status_register();
+
     PRINTF("Manual readings: {%d, %d}\n", read0, read1);
 
     protected_wait_for_dma_interrupt();
@@ -126,9 +166,13 @@ int main(int argc, char *argv[]) {
     dma_launch( &trans );
 
     protected_wait_for_dma_interrupt();
+
+    print_status_register();
 
     if (compare_print_fifo_array() == 0) {return EXIT_FAILURE;};
 
+    if (!iffifo_intr_flag) {return EXIT_FAILURE;};
+
     return EXIT_SUCCESS;
 
 }