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Dockerfile restructure + Lakeroad Yosys plugin (#408)
This PR does two things that are only slightly related (sorry about that): - Introduces Lakeroad Yosys plugin, plus tests and documentation - Restructures/simplifies/solidifies the Dockerfile The Lakeroad Yosys plugin is a plugin for the Yosys synthesis tool which calls Lakeroad to compile Verilog modules. During the process of adding the plugin into CI, I realized we needed to build Yosys from source, which led me to restructuring the Dockerfile. The restructure of the Dockerfile does a few things: - Moves dependencies into an explicit file (rather than adhoc or git submodules) - Pulls specific binaries out of oss-cad-suite and deletes the unneeded ones
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[submodule "lakeroad-private"] | ||
path = lakeroad-private | ||
url = [email protected]:uwsampl/lakeroad-private | ||
[submodule "bitwuzla"] | ||
path = bitwuzla | ||
url = [email protected]:bitwuzla/bitwuzla.git | ||
[submodule "lakeroad-egglog/yosys"] | ||
path = lakeroad-egglog/yosys | ||
url = [email protected]:uwsampl/yosys |
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Submodule bitwuzla
deleted from
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#!/bin/sh | ||
# This script exports a number of variables that help to pin the versions of | ||
# various Lakeroad dependencies. | ||
# | ||
# To use, source this script before running relevant commands e.g. in a | ||
# Dockerfile. | ||
# | ||
# This is just one possible way to implement dependency tracking. Some of the | ||
# other options are: | ||
# - No tracking at all. E.g. in the Dockerfile, we could clone STP at a specific | ||
# commit, using a "magic constant" commit hash. This isn't ideal, because if | ||
# we use STP elsewhere (e.g. in the evaluation) we have to make sure we keep | ||
# the commit hashes in sync. | ||
# - Git submodules. This is very similar to what we've chosen to do, but it's | ||
# more directly supported by Git. For example, we used to have Bitwuzla be a | ||
# submodule of Lakeroad. This avoids the need to sync commit hashes as in the | ||
# first option. However, it's a bit overkill to add a full repository as a | ||
# submodule when we only need the resulting binary. | ||
# | ||
# This option is essentially a lighter-weight version of submodules. We track | ||
# the commit hashes of the dependencies we need, but nothing additional is | ||
# cloned on a `git clone --recursive`. | ||
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export STP_COMMIT_HASH="0510509a85b6823278211891cbb274022340fa5c" | ||
export YICES2_COMMIT_HASH="e27cf308cffb0ecc6cc7165c10e81ca65bc303b3" | ||
export BITWUZLA_COMMIT_HASH="b655bc0cde570258367bf8f09a113bc7b95e46e9" | ||
export OSS_CAD_SUITE_DATE="2023-08-06" | ||
export RACKET_FMT_COMMIT_HASH=bd44477 | ||
export YOSYS_COMMIT_HASH="70d35314dbd7521870047ed607897f22dc48cbc3" |
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integration_tests/lakeroad/xilinx_muladd_0_stage_signed_8_bit_yosys_plugin.sv
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// RUN: outfile=$(mktemp) | ||
// RUN: yosys -m "$LAKEROAD_DIR/yosys-plugin/lakeroad.so" -p " \ | ||
// RUN: read_verilog %s; \ | ||
// RUN: hierarchy -top in_module; \ | ||
// RUN: lakeroad in_module; \ | ||
// RUN: rename in_module out_module; \ | ||
// RUN: write_verilog $outfile" | ||
// RUN: FileCheck %s < $outfile | ||
// RUN: if [ -z ${LAKEROAD_PRIVATE_DIR+x} ]; then \ | ||
// RUN: echo "Warning: LAKEROAD_PRIVATE_DIR is not set. Skipping simulation."; \ | ||
// RUN: exit 0; \ | ||
// RUN: else \ | ||
// RUN: python3 $LAKEROAD_DIR/bin/simulate_with_verilator.py \ | ||
// RUN: --test_module_name out_module \ | ||
// RUN: --ground_truth_module_name in_module \ | ||
// RUN: --max_num_tests=10000 \ | ||
// RUN: --verilog_filepath $outfile \ | ||
// RUN: --verilog_filepath %s \ | ||
// RUN: --initiation_interval 0 \ | ||
// RUN: --output_signal out:8 \ | ||
// RUN: --input_signal a:8 \ | ||
// RUN: --input_signal b:8 \ | ||
// RUN: --input_signal c:8 \ | ||
// RUN: --verilator_include_dir "$LAKEROAD_PRIVATE_DIR/DSP48E2/" \ | ||
// RUN: --verilator_extra_arg='-DXIL_XECLIB' \ | ||
// RUN: --verilator_extra_arg='-Wno-UNOPTFLAT' \ | ||
// RUN: --verilator_extra_arg='-Wno-LATCH' \ | ||
// RUN: --verilator_extra_arg='-Wno-WIDTH' \ | ||
// RUN: --verilator_extra_arg='-Wno-STMTDLY' \ | ||
// RUN: --verilator_extra_arg='-Wno-CASEX' \ | ||
// RUN: --verilator_extra_arg='-Wno-TIMESCALEMOD' \ | ||
// RUN: --verilator_extra_arg='-Wno-PINMISSING'; \ | ||
// RUN: fi | ||
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(* template = "dsp" *) | ||
(* architecture = "xilinx-ultrascale-plus" *) | ||
(* pipeline_depth = 0 *) | ||
module in_module( | ||
(* data *) | ||
input signed [7:0] a, | ||
(* data *) | ||
input signed [7:0] b, | ||
(* data *) | ||
input signed [7:0] c, | ||
(* out *) | ||
output [7:0] out); | ||
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assign out = (a * b) + c; | ||
endmodule | ||
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// CHECK: module out_module(a, b, c, out); | ||
// CHECK: DSP48E2 #( | ||
// CHECK: endmodule |
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lakeroad.d | ||
lakeroad.so | ||
lakeroad.so.dSYM/ |
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lakeroad.so: lakeroad.cc | ||
$(CXX) $(shell yosys-config --cxxflags --ldflags) -shared -o $@ lakeroad.cc -lboost_filesystem | ||
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clean: | ||
rm -rfv *.d *.o lakeroad.so* | ||
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-include *.d |
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