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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,111 @@ | ||
| diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h | ||
| index 9246bca0a0089b24cf315de75d9bee155c74d32d..9c62552bec344e370996a028d809934e4a6f4420 100644 | ||
| --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h | ||
| +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h | ||
| @@ -194,6 +194,7 @@ extern int amdgpu_emu_mode; | ||
| extern uint amdgpu_smu_memory_pool_size; | ||
| extern int amdgpu_smu_pptable_id; | ||
| extern uint amdgpu_dc_feature_mask; | ||
| +extern uint amdgpu_freesync_vid_mode; | ||
| extern uint amdgpu_dc_debug_mask; | ||
| extern uint amdgpu_dc_visual_confirm; | ||
| extern int amdgpu_dm_abm_level; | ||
| diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | ||
| index af7fae7907d71ed9efb771f50acdf483b4230113..8e1299fe2c54a809761301c15e8bcbe918986bac 100644 | ||
| --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | ||
| +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | ||
| @@ -199,6 +199,7 @@ int amdgpu_mes_kiq; | ||
| int amdgpu_noretry = -1; | ||
| int amdgpu_force_asic_type = -1; | ||
| int amdgpu_tmz = -1; /* auto */ | ||
| +uint amdgpu_freesync_vid_mode; | ||
| int amdgpu_reset_method = -1; /* auto */ | ||
| int amdgpu_num_kcq = -1; | ||
| int amdgpu_smartshift_bias; | ||
| @@ -883,6 +884,32 @@ module_param_named(damageclips, amdgpu_damage_clips, int, 0444); | ||
| MODULE_PARM_DESC(tmz, "Enable TMZ feature (-1 = auto (default), 0 = off, 1 = on)"); | ||
| module_param_named(tmz, amdgpu_tmz, int, 0444); | ||
|
|
||
| +/** | ||
| + * DOC: freesync_video (uint) | ||
| + * Enable the optimization to adjust front porch timing to achieve seamless | ||
| + * mode change experience when setting a freesync supported mode for which full | ||
| + * modeset is not needed. | ||
| + * | ||
| + * The Display Core will add a set of modes derived from the base FreeSync | ||
| + * video mode into the corresponding connector's mode list based on commonly | ||
| + * used refresh rates and VRR range of the connected display, when users enable | ||
| + * this feature. From the userspace perspective, they can see a seamless mode | ||
| + * change experience when the change between different refresh rates under the | ||
| + * same resolution. Additionally, userspace applications such as Video playback | ||
| + * can read this modeset list and change the refresh rate based on the video | ||
| + * frame rate. Finally, the userspace can also derive an appropriate mode for a | ||
| + * particular refresh rate based on the FreeSync Mode and add it to the | ||
| + * connector's mode list. | ||
| + * | ||
| + * Note: This is an experimental feature. | ||
| + * | ||
| + * The default value: 0 (off). | ||
| + */ | ||
| +MODULE_PARM_DESC( | ||
| + freesync_video, | ||
| + "Enable freesync modesetting optimization feature (0 = off (default), 1 = on)"); | ||
| +module_param_named(freesync_video, amdgpu_freesync_vid_mode, uint, 0444); | ||
| + | ||
| /** | ||
| * DOC: reset_method (int) | ||
| * GPU reset method (-1 = auto (default), 0 = legacy, 1 = mode0, 2 = mode1, 3 = mode2, 4 = baco) | ||
| diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | ||
| index 46dd06e8fc7e127dbaa0d7c8c96632c7972b901a..1010a89a17e627845c322fc4874fd1dba2f55cff 100644 | ||
| --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | ||
| +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | ||
| @@ -6233,7 +6234,8 @@ create_stream_for_sink(struct drm_connector *connector, | ||
| * and the modelist may not be filled in time. | ||
| */ | ||
| DRM_DEBUG_DRIVER("No preferred mode found\n"); | ||
| - } else { | ||
| - recalculate_timing = is_freesync_video_mode(&mode, aconnector); | ||
| + } else if (aconnector) { | ||
| + recalculate_timing = amdgpu_freesync_vid_mode && | ||
| + is_freesync_video_mode(&mode, aconnector); | ||
| if (recalculate_timing) { | ||
| freesync_mode = get_highest_refresh_rate_mode(aconnector, false); | ||
| drm_mode_copy(&saved_mode, &mode); | ||
| @@ -7544,7 +7545,7 @@ static void amdgpu_dm_connector_add_freesync_modes(struct drm_connector *connect | ||
| struct amdgpu_dm_connector *amdgpu_dm_connector = | ||
| to_amdgpu_dm_connector(connector); | ||
|
|
||
| - if (!edid) | ||
| + if (!(amdgpu_freesync_vid_mode && edid)) | ||
| return; | ||
|
|
||
| if (amdgpu_dm_connector->max_vfreq - amdgpu_dm_connector->min_vfreq > 10) | ||
| @@ -9838,7 +9839,8 @@ static int dm_update_crtc_state(struct amdgpu_display_manager *dm, | ||
| * TODO: Refactor this function to allow this check to work | ||
| * in all conditions. | ||
| */ | ||
| - if (dm_new_crtc_state->stream && | ||
| + if (amdgpu_freesync_vid_mode && | ||
| + dm_new_crtc_state->stream && | ||
| is_timing_unchanged_for_freesync(new_crtc_state, old_crtc_state)) | ||
| goto skip_modeset; | ||
|
|
||
| @@ -9878,7 +9880,7 @@ static int dm_update_crtc_state(struct amdgpu_display_manager *dm, | ||
| } | ||
|
|
||
| /* Now check if we should set freesync video mode */ | ||
| - if (dm_new_crtc_state->stream && | ||
| + if (amdgpu_freesync_vid_mode && dm_new_crtc_state->stream && | ||
| dc_is_stream_unchanged(new_stream, dm_old_crtc_state->stream) && | ||
| dc_is_stream_scaling_unchanged(new_stream, dm_old_crtc_state->stream) && | ||
| is_timing_unchanged_for_freesync(new_crtc_state, | ||
| @@ -9891,7 +9893,7 @@ static int dm_update_crtc_state(struct amdgpu_display_manager *dm, | ||
| set_freesync_fixed_config(dm_new_crtc_state); | ||
|
|
||
| goto skip_modeset; | ||
| - } else if (aconnector && | ||
| + } else if (amdgpu_freesync_vid_mode && aconnector && | ||
| is_freesync_video_mode(&new_crtc_state->mode, | ||
| aconnector)) { | ||
| struct drm_display_mode *high_mode; | ||
|
|