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DepthRaster: Use vmaxvq_s32 to implement AnyZeroSignBit more efficiently on ARM64 #19892

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merged 1 commit into from
Jan 20, 2025
Merged

DepthRaster: Use vmaxvq_s32 to implement AnyZeroSignBit more efficiently on ARM64 #19892

merged 1 commit into from
Jan 20, 2025

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hrydgard
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Turns out ARM64 has some neat horizontal reduce instructions. Thanks ryg for the pointer.

@hrydgard hrydgard added this to the v1.19.0 milestone Jan 19, 2025
@hrydgard hrydgard merged commit 9ab8875 into master Jan 20, 2025
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@hrydgard hrydgard deleted the minor-depth-opt branch January 20, 2025 00:53
@fp64
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fp64 commented Jan 20, 2025

For basic NEON version, wouldn't something like vshrn_n_u32 (or maybe even vshrn_n_u64) work (similar to what is described here: https://community.arm.com/arm-community-blogs/b/infrastructure-solutions-blog/posts/porting-x86-vector-bitmask-optimizations-to-arm-neon with vshrn_n_u16)? Perhaps even for more general SignBits(), e.g. (mask4x16*0x0001000200040008ull)>>48.
I don't know much about ARM, though.

@hrydgard
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Yes absolutely. Just haven't gotten around to testing it

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