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[GSoC] Updated DC-DC Verilog Generation and Simulations #3

[GSoC] Updated DC-DC Verilog Generation and Simulations

[GSoC] Updated DC-DC Verilog Generation and Simulations #3

Triggered via pull request September 11, 2023 15:48
Status Success
Total duration 2m 18s
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test_python_api.yml

on: pull_request
Matrix: build
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3 warnings
build (3.9, ubuntu-latest)
The following actions uses node12 which is deprecated and will be forced to run on node16: styfle/[email protected], actions/checkout@v2, actions/setup-python@v2. For more info: https://github.blog/changelog/2023-06-13-github-actions-all-actions-will-run-on-node16-instead-of-node12-by-default/
build (3.8, ubuntu-latest)
The following actions uses node12 which is deprecated and will be forced to run on node16: styfle/[email protected], actions/checkout@v2, actions/setup-python@v2. For more info: https://github.blog/changelog/2023-06-13-github-actions-all-actions-will-run-on-node16-instead-of-node12-by-default/
build (3.7, ubuntu-latest)
The following actions uses node12 which is deprecated and will be forced to run on node16: styfle/[email protected], actions/checkout@v2, actions/setup-python@v2. For more info: https://github.blog/changelog/2023-06-13-github-actions-all-actions-will-run-on-node16-instead-of-node12-by-default/