Chipathon2024 SystemsGenesys #348
Conversation
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Initial code upload for divide-by-two circuit |
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can you please rename the PR and provide a description of the circuit along with the python code. Follow the PR guidelines as mentioned in the doc. |
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Changes done. Can you point to the document please? |
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here is the link to the doc |
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Hello @Lefteris-B thank you for the PR. Can you confirm that the design is passing DRC/LVS? Also, could you please include the design in an independent python file. You can still import and use the design in your notebook. For example, you can create a new file called |
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I will work on it this weekend. Thank you. |
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We separated the notebook functionality into separate files. Also fixed the collab file. Looking into DRC, LVS |
| from glayout.flow.routing.straight_route import straight_route | ||
| from glayout.flow.routing.c_route import c_route | ||
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| def create_nmos_latch_layout(pdk): |
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It would be good to generate the spice netlist for this. Refer to
| from latch_design import create_nmos_latch_layout | ||
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| def create_divide_by_two_circuit(pdk): | ||
| divider = Component("divide_by_two") |
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You can generate the spice netlist for this once the latch netlist is generated. Refer to
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