Move Verlator simutil upstream to OpenTitan

lowRISC/opentitan#2311 added the Verilator
memutils to OpenTitan as upstream. This commit is the second part of the
story, removing the code from the Ibex repository, and vendoring it back
in from OpenTitan.

This also superseded lowRISC#844, which has now been included through
OpenTitan.

vendor/lowrisc_dv_verilator.lock.hjson

@@ -0,0 +1,15 @@
+// Copyright lowRISC contributors.
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+// This file is generated by the util/vendor script. Please do not modify it
+// manually.
+
+{
+  upstream:
+  {
+    url: https://github.com/lowRISC/opentitan
+    rev: 5b098350c1099526eb7a3b2056432f306af76de1
+    only_subdir: hw/dv/verilator
+  }
+}

vendor/lowrisc_dv_verilator.vendor.hjson

@@ -0,0 +1,13 @@
+// Copyright lowRISC contributors.
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+{
+  name: "dv_verilator",
+  target_dir: "lowrisc_ip/dv_verilator",
+
+  upstream: {
+    url: "https://github.com/lowRISC/opentitan"
+    rev: "master"
+    only_subdir: "hw/dv/verilator"
+  }
+}

dv/verilator/memutil/cpp/verilator_memutil.cc → vendor/lowrisc_ip/dv_verilator/cpp/verilator_memutil.cc

@@ -45,8 +45,8 @@ bool VerilatorMemUtil::RegisterMemoryArea(const std::string name,
                                           size_t width_bit) {
   MemArea mem = {.name = name, .location = location, .width_bit = width_bit};
 
-  assert((width_bit == 32 || width_bit == 64) &&
-         "TODO: Check if width other than 32 and 64 works as expected.");
+  assert((width_bit <= 128) &&
+         "TODO: Memory loading only supported up to 128 bits.");
 
   auto ret = mem_register_.emplace(name, mem);
   if (ret.second == false) {
@@ -397,9 +397,9 @@ bool VerilatorMemUtil::MemWrite(const MemArea &m, const std::string &filepath,
     return false;
   }
 
-  if ((m.width_bit % 32) != 0) {
+  if ((m.width_bit % 8) != 0) {
     std::cerr << "ERROR: width for: " << m.name
-              << "must be a multiple of 32 (was : " << m.width_bit << ")"
+              << "must be a multiple of 8 (was : " << m.width_bit << ")"
               << std::endl;
     return false;
   }

dv/verilator/memutil/cpp/verilator_memutil.h → vendor/lowrisc_ip/dv_verilator/cpp/verilator_memutil.h

@@ -2,8 +2,8 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
-#ifndef VERILATOR_MEMUTIL_H_
-#define VERILATOR_MEMUTIL_H_
+#ifndef OPENTITAN_HW_DV_VERILATOR_CPP_VERILATOR_MEMUTIL_H_
+#define OPENTITAN_HW_DV_VERILATOR_CPP_VERILATOR_MEMUTIL_H_
 
 #include "sim_ctrl_extension.h"
 
@@ -112,4 +112,4 @@ class VerilatorMemUtil : public SimCtrlExtension {
   bool WriteVmemToMem(const svScope &scope, const std::string &filepath);
 };
 
-#endif  // VERILATOR_MEMUTIL_H_
+#endif  // OPENTITAN_HW_DV_VERILATOR_CPP_VERILATOR_MEMUTIL_H_

dv/verilator/simutil_verilator/cpp/sim_ctrl_extension.h → vendor/lowrisc_ip/dv_verilator/simutil_verilator/cpp/sim_ctrl_extension.h

@@ -2,8 +2,8 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
-#ifndef SIM_CTRL_EXTENSION_H_
-#define SIM_CTRL_EXTENSION_H_
+#ifndef OPENTITAN_HW_DV_VERILATOR_SIMUTIL_VERILATOR_CPP_SIM_CTRL_EXTENSION_H_
+#define OPENTITAN_HW_DV_VERILATOR_SIMUTIL_VERILATOR_CPP_SIM_CTRL_EXTENSION_H_
 
 class SimCtrlExtension {
  public:
@@ -38,4 +38,4 @@ class SimCtrlExtension {
   virtual void PostExec() {}
 };
 
-#endif  // SIM_CTRL_EXTENSION_H_
+#endif  // OPENTITAN_HW_DV_VERILATOR_SIMUTIL_VERILATOR_CPP_SIM_CTRL_EXTENSION_H_

dv/verilator/simutil_verilator/cpp/verilated_toplevel.h → vendor/lowrisc_ip/dv_verilator/simutil_verilator/cpp/verilated_toplevel.h

@@ -2,8 +2,8 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
-#ifndef VERILATED_TOPLEVEL_H_
-#define VERILATED_TOPLEVEL_H_
+#ifndef OPENTITAN_HW_DV_VERILATOR_SIMUTIL_VERILATOR_CPP_VERILATED_TOPLEVEL_H_
+#define OPENTITAN_HW_DV_VERILATOR_SIMUTIL_VERILATOR_CPP_VERILATED_TOPLEVEL_H_
 
 #ifndef TOPLEVEL_NAME
 #error "TOPLEVEL_NAME must be set to the name of the toplevel."
@@ -152,4 +152,4 @@ class TOPLEVEL_NAME : public VERILATED_TOPLEVEL_NAME, public VerilatedToplevel {
   }
 };
 
-#endif  // VERILATED_TOPLEVEL_H_
+#endif  // OPENTITAN_HW_DV_VERILATOR_SIMUTIL_VERILATOR_CPP_VERILATED_TOPLEVEL_H_

dv/verilator/simutil_verilator/cpp/verilator_sim_ctrl.cc → vendor/lowrisc_ip/dv_verilator/simutil_verilator/cpp/verilator_sim_ctrl.cc

@@ -5,12 +5,11 @@
 #include "verilator_sim_ctrl.h"
 
 #include <getopt.h>
+#include <iostream>
 #include <signal.h>
 #include <sys/stat.h>
 #include <verilated.h>
 
-#include <iostream>
-
 // This is defined by Verilator and passed through the command line
 #ifndef VM_TRACE
 #define VM_TRACE 0
@@ -202,9 +201,7 @@ bool VerilatorSimCtrl::ParseCommandArgs(int argc, char **argv, bool &exit_app) {
 }
 
 void VerilatorSimCtrl::PrintHelp() const {
-  std::cout << "Execute a simulation model for " << GetName()
-            << "\n"
-               "\n";
+  std::cout << "Execute a simulation model for " << GetName() << "\n\n";
   if (tracing_possible_) {
     std::cout << "-t|--trace\n"
                  "  Write a trace file from the start\n\n";

dv/verilator/simutil_verilator/cpp/verilator_sim_ctrl.h → vendor/lowrisc_ip/dv_verilator/simutil_verilator/cpp/verilator_sim_ctrl.h

@@ -2,8 +2,8 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
-#ifndef VERILATOR_SIM_CTRL_H_
-#define VERILATOR_SIM_CTRL_H_
+#ifndef OPENTITAN_HW_DV_VERILATOR_SIMUTIL_VERILATOR_CPP_VERILATOR_SIM_CTRL_H_
+#define OPENTITAN_HW_DV_VERILATOR_SIMUTIL_VERILATOR_CPP_VERILATOR_SIM_CTRL_H_
 
 #include <chrono>
 #include <string>
@@ -237,4 +237,4 @@ class VerilatorSimCtrl {
   void Trace();
 };
 
-#endif  // VERILATOR_SIM_CTRL_H_
+#endif  // OPENTITAN_HW_DV_VERILATOR_SIMUTIL_VERILATOR_CPP_VERILATOR_SIM_CTRL_H_