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rlc and rlca instructions
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jonathanballs committed Sep 12, 2024
1 parent 798d860 commit 2c73c1b
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Showing 3 changed files with 31 additions and 11 deletions.
27 changes: 22 additions & 5 deletions src/cpu/execution/bit.rs
Original file line number Diff line number Diff line change
Expand Up @@ -54,6 +54,21 @@ impl CPU {
self.registers.f.zero = false;
}

pub(in crate::cpu) fn rlc(&mut self, mmu: &mut MMU, r: R8) {
let value = self.get_r8_byte(mmu, r);
let result = (value << 1) | (value >> 7);
self.set_r8_byte(mmu, r, result);
self.registers.f.zero = result == 0;
self.registers.f.subtract = false;
self.registers.f.half_carry = false;
self.registers.f.carry = value >> 7 == 1;
}

pub(in crate::cpu) fn rlca(&mut self, mmu: &mut MMU) {
self.rlc(mmu, R8::A);
self.registers.f.zero = false;
}

pub(in crate::cpu) fn srl(&mut self, mmu: &mut MMU, reg: R8) {
let value = self.get_r8_byte(mmu, reg);
let result = value >> 1;
Expand All @@ -75,13 +90,15 @@ impl CPU {
self.registers.f.zero = new_value == 0;
}

pub(in crate::cpu) fn rlca(&mut self) {
let value = self.registers.a;
self.registers.f.carry = value & 0x80 == 0x80;
self.registers.f.zero = false;
pub(in crate::cpu) fn sra(&mut self, mmu: &mut MMU, reg: R8) {
let value = self.get_r8_byte(mmu, reg);
let result = value >> 1;
self.set_r8_byte(mmu, reg, result);

self.registers.f.carry = value & 0x1 == 0x1;
self.registers.f.half_carry = false;
self.registers.f.subtract = false;
self.registers.a = (value << 1) | (value >> 7);
self.registers.f.zero = result == 0;
}

pub(in crate::cpu) fn cpl(&mut self) {
Expand Down
4 changes: 2 additions & 2 deletions src/cpu/execution/control_flow.rs
Original file line number Diff line number Diff line change
Expand Up @@ -77,12 +77,12 @@ impl CPU {
*/
pub(in crate::cpu) fn push(&mut self, mmu: &mut MMU, value: u16) {
self.set_memory_word(mmu, self.registers.sp - 2, value);
self.registers.sp -= 2;
self.registers.sp = self.registers.sp.wrapping_sub(2);
}

pub(in crate::cpu) fn pop(&mut self, mmu: &mut MMU, reg: R16stk) {
let value = self.get_memory_word(mmu, self.registers.sp);
self.registers.set_r16_stk(reg, value);
self.registers.sp += 2;
self.registers.sp = self.registers.sp.wrapping_add(2);
}
}
11 changes: 7 additions & 4 deletions src/cpu/mod.rs
Original file line number Diff line number Diff line change
Expand Up @@ -46,6 +46,7 @@ impl CPU {
Instruction::LdhACmem => self.lda(mmu.read_byte(0xFF00 + self.registers.c as u16)),
Instruction::LdHlSpImm8(n) => self.ld_hl_sp(n),
Instruction::LdSpHl => self.ld_r16(R16::SP, self.registers.get_r16(R16::HL)),
Instruction::LdImm16memSp(n) => self.set_memory_word(mmu, self.registers.sp, n),

// Arithmetic
Instruction::IncR8(reg) => self.inc(mmu, reg),
Expand Down Expand Up @@ -81,8 +82,10 @@ impl CPU {
Instruction::Rla => self.rla(mmu),
Instruction::SrlR8(reg) => self.srl(mmu, reg),
Instruction::SlaR8(reg) => self.sla(mmu, reg),
Instruction::SraR8(reg) => self.sra(mmu, reg),
Instruction::Cpl => self.cpl(),
Instruction::Rlca => self.rlca(),
Instruction::RlcR8(r) => self.rlc(mmu, r),
Instruction::Rlca => self.rlca(mmu),
Instruction::Daa => self.daa(),
Instruction::SwapR8(reg) => self.swap(mmu, reg),
Instruction::Scf => self.scf(),
Expand Down Expand Up @@ -216,11 +219,11 @@ impl CPU {
}
}

pub fn set_memory_word(&mut self, memory: &mut MMU, addr: u16, word: u16) {
pub fn set_memory_word(&mut self, mmu: &mut MMU, addr: u16, word: u16) {
let little = (word & 0xFF) as u8;
let big = (word >> 8) as u8;
memory.write_byte(addr, little);
memory.write_byte(addr + 1, big)
mmu.write_byte(addr, little);
mmu.write_byte(addr + 1, big)
}

pub fn get_memory_word(&mut self, memory: &MMU, addr: u16) -> u16 {
Expand Down

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