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split instruction execution code across cpu execution submodules
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use crate::{cpu::CPU, instructions::r8::R8, mmu::MMU}; | ||
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impl CPU { | ||
/* | ||
* | ||
* Bit checking and setting | ||
* | ||
*/ | ||
pub(in crate::cpu) fn bit(&mut self, mmu: &MMU, r: R8, bit_index: u8) { | ||
let result = self.get_r8_byte(mmu, r) & (1 << bit_index); | ||
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self.registers.f.zero = result == 0; | ||
self.registers.f.subtract = false; | ||
self.registers.f.half_carry = true; | ||
} | ||
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pub(in crate::cpu) fn res(&mut self, mmu: &mut MMU, r: R8, bit_index: u8) { | ||
let result = self.get_r8_byte(mmu, r) & !(1 << bit_index); | ||
self.set_r8_byte(mmu, r, result); | ||
} | ||
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pub(in crate::cpu) fn set(&mut self, mmu: &mut MMU, r: R8, bit_index: u8) { | ||
let result = self.get_r8_byte(mmu, r) | 1 << bit_index; | ||
self.set_r8_byte(mmu, r, result); | ||
} | ||
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/* | ||
* | ||
* Bit rotation | ||
* | ||
*/ | ||
pub(in crate::cpu) fn swap(&mut self, mmu: &mut MMU, r: R8) { | ||
let register_value = self.get_r8_byte(mmu, r); | ||
let result = (register_value >> 4) | (register_value << 4); | ||
self.set_r8_byte(mmu, r, result); | ||
self.registers.f.zero = result == 0; | ||
self.registers.f.carry = false; | ||
self.registers.f.half_carry = false; | ||
self.registers.f.subtract = false; | ||
} | ||
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pub(in crate::cpu) fn rl(&mut self, mmu: &mut MMU, r: R8) { | ||
let value = self.get_r8_byte(mmu, r); | ||
let result = (value << 1) | self.registers.f.carry as u8; | ||
self.set_r8_byte(mmu, r, result); | ||
self.registers.f.zero = result == 0; | ||
self.registers.f.subtract = false; | ||
self.registers.f.half_carry = false; | ||
self.registers.f.carry = value >> 7 == 1; | ||
} | ||
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pub(in crate::cpu) fn rla(&mut self, mmu: &mut MMU) { | ||
self.rl(mmu, R8::A); | ||
self.registers.f.zero = false; | ||
} | ||
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pub(in crate::cpu) fn srl(&mut self, mmu: &mut MMU, reg: R8) { | ||
let value = self.get_r8_byte(mmu, reg); | ||
let result = value >> 1; | ||
self.set_r8_byte(mmu, reg, result); | ||
self.registers.f.carry = value & 1 == 1; | ||
self.registers.f.half_carry = false; | ||
self.registers.f.subtract = false; | ||
self.registers.f.zero = result == 0; | ||
} | ||
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pub(in crate::cpu) fn sla(&mut self, mmu: &mut MMU, reg: R8) { | ||
let value = self.get_r8_byte(mmu, R8::A); | ||
let new_value = (value << 1) | self.registers.f.carry as u8; | ||
self.set_r8_byte(mmu, reg, new_value); | ||
self.registers.f.carry = value >> 7 == 1; | ||
self.registers.f.half_carry = false; | ||
self.registers.f.subtract = false; | ||
self.registers.f.zero = new_value == 0; | ||
} | ||
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pub(in crate::cpu) fn rlca(&mut self) { | ||
let value = self.registers.a; | ||
self.registers.f.carry = value >> 7 > 0; | ||
self.registers.f.zero = false; | ||
self.registers.f.half_carry = false; | ||
self.registers.f.subtract = false; | ||
self.registers.a = (self.registers.a << 1) | (self.registers.a >> 7); | ||
} | ||
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pub(in crate::cpu) fn cpl(&mut self) { | ||
self.registers.a = !self.registers.a; | ||
self.registers.f.half_carry = true; | ||
self.registers.f.subtract = true; | ||
} | ||
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pub(in crate::cpu) fn daa(&mut self) { | ||
let mut correction = 0; | ||
let mut set_carry = false; | ||
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if self.registers.f.half_carry | ||
|| (!self.registers.f.subtract && (self.registers.a & 0xf) > 9) | ||
{ | ||
correction |= 0x6; | ||
} | ||
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if self.registers.f.carry || (!self.registers.f.subtract && self.registers.a > 0x99) { | ||
correction |= 0x60; | ||
set_carry = true; | ||
} | ||
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if self.registers.f.subtract { | ||
self.registers.a = self.registers.a.wrapping_sub(correction); | ||
} else { | ||
self.registers.a = self.registers.a.wrapping_add(correction); | ||
} | ||
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self.registers.f.zero = self.registers.a == 0; | ||
self.registers.f.half_carry = false; | ||
self.registers.f.carry = set_carry; | ||
} | ||
} |
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use crate::{ | ||
cpu::CPU, | ||
instructions::{cond::Cond, r16stk::R16stk}, | ||
mmu::MMU, | ||
}; | ||
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impl CPU { | ||
/* | ||
* | ||
* Jumps | ||
* | ||
*/ | ||
pub(in crate::cpu) fn jp(&mut self, addr: u16) { | ||
self.registers.pc = addr; | ||
} | ||
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pub(in crate::cpu) fn jp_cond(&mut self, addr: u16, cond: Cond) { | ||
if self.registers.f.evaluate_condition(cond) { | ||
self.jp(addr) | ||
} | ||
} | ||
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pub(in crate::cpu) fn jr(&mut self, offset: i8) { | ||
self.registers.pc = self.registers.pc.wrapping_add((offset as i16) as u16); | ||
} | ||
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pub(in crate::cpu) fn jr_cond(&mut self, offset: i8, cond: Cond) { | ||
if self.registers.f.evaluate_condition(cond) { | ||
self.jr(offset) | ||
} | ||
} | ||
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/* | ||
* | ||
* Call and Return | ||
* | ||
*/ | ||
pub(in crate::cpu) fn call(&mut self, mmu: &mut MMU, addr: u16) { | ||
self.set_memory_word(mmu, self.registers.sp - 2, self.registers.pc + 3); | ||
self.registers.sp -= 2; | ||
self.registers.pc = addr; | ||
} | ||
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pub(in crate::cpu) fn call_cond(&mut self, mmu: &mut MMU, cond: Cond, addr: u16) { | ||
if self.registers.f.evaluate_condition(cond) { | ||
self.call(mmu, addr) | ||
} | ||
} | ||
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pub(in crate::cpu) fn rst_tgt3(&mut self, mmu: &mut MMU, addr: u16) { | ||
self.set_memory_word(mmu, self.registers.sp - 2, self.registers.pc + 1); | ||
self.registers.sp -= 2; | ||
self.registers.pc = addr - 1 | ||
} | ||
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pub(in crate::cpu) fn ret(&mut self, mmu: &mut MMU) { | ||
self.registers.pc = self.get_memory_word(mmu, self.registers.sp) - 1; | ||
self.registers.sp += 2; | ||
} | ||
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pub(in crate::cpu) fn ret_cond(&mut self, mmu: &mut MMU, cond: Cond) { | ||
if self.registers.f.evaluate_condition(cond) { | ||
self.registers.pc = self.get_memory_word(mmu, self.registers.sp) - 1; | ||
self.registers.sp += 2; | ||
} | ||
} | ||
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pub(in crate::cpu) fn reti(&mut self, mmu: &mut MMU) { | ||
self.ret(mmu); | ||
self.ime = true; | ||
} | ||
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/* | ||
* | ||
* Push and pop | ||
* | ||
*/ | ||
pub(in crate::cpu) fn push(&mut self, mmu: &mut MMU, value: u16) { | ||
self.set_memory_word(mmu, self.registers.sp - 2, value); | ||
self.registers.sp -= 2; | ||
} | ||
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pub(in crate::cpu) fn pop(&mut self, mmu: &mut MMU, reg: R16stk) { | ||
let value = self.get_memory_word(mmu, self.registers.sp); | ||
self.registers.set_r16_stk(reg, value); | ||
self.registers.sp += 2; | ||
} | ||
} |
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use crate::{ | ||
cpu::CPU, | ||
instructions::{r16::R16, r16mem::R16mem, r8::R8}, | ||
mmu::MMU, | ||
}; | ||
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impl CPU { | ||
pub(in crate::cpu) fn lda(&mut self, value: u8) { | ||
self.registers.a = value; | ||
} | ||
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pub(in crate::cpu) fn lda_r16mem(&mut self, mmu: &mut MMU, reg: R16mem) { | ||
self.registers.a = mmu.read_byte(self.registers.get_r16_mem(reg)) | ||
} | ||
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pub(in crate::cpu) fn ld_r16mem(&mut self, mmu: &mut MMU, reg: R16mem, value: u8) { | ||
mmu.write_byte(self.registers.get_r16_mem(reg), value) | ||
} | ||
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pub(in crate::cpu) fn ld_r8(&mut self, mmu: &mut MMU, reg: R8, value: u8) { | ||
self.set_r8_byte(mmu, reg, value); | ||
} | ||
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pub(in crate::cpu) fn ld_r16(&mut self, reg: R16, value: u16) { | ||
self.registers.set_r16(reg, value) | ||
} | ||
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pub(in crate::cpu) fn ldh_addr(&mut self, mmu: &mut MMU, offset: u8, value: u8) { | ||
mmu.write_byte(0xFF00 + offset as u16, value) | ||
} | ||
} |
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mod alu; | ||
mod bit; | ||
mod control_flow; | ||
mod load; |
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