Implementation of a single-cycle MIPS processor in VHDL
- Open the mipos.qpf in Quartus II (v13.0)
- Open ModelSim
- File -> New -> Project...
- Type in infos: Project Name: 'mipos_tst' Project Location: 'path/to/mipos' Press "OK"
- Click "Add Existing File"
- Add all .vht and .vhd files
- Close File Adder dialog box
- Compile -> Compile All
- Simulate -> Start Simulation...
- Click in 'work' library and then in 'mipos_tst', press "OK"
- Right click in 'mipos_component'(inside 'mipos_tst')-> "Add wave"
- Adjust timeline
- ???
- Profit