Skip to content

Commit

Permalink
[WIP] afc_ref_fofb_ctrl_gen.vhd: remove DCC acq cores
Browse files Browse the repository at this point in the history 
DCC channels were kept so channel indexes don't change, but they should be
removed too.
  • Loading branch information
@guilhermerc
guilhermerc committed Dec 11, 2023
1 parent 23ecf5e commit 899c0d9
Showing 1 changed file with 5 additions and 65 deletions.
70 changes: 5 additions & 65 deletions hdl/top/afc_ref_design_gen/afc_ref_fofb_ctrl_gen.vhd
View file
Original file line number Diff line number Diff line change
Expand Up @@ -716,13 +716,11 @@ architecture top of afc_ref_fofb_ctrl_gen is
constant c_ACQ_FIFO_SIZE : natural := 256;

-- Number of acquisition cores
constant c_ACQ_NUM_CORES : natural := c_NUM_FOFC_CC_CORES + c_RTM_LAMP_NUM_CORES + c_NUM_SYS_ID_CORES;
CONSTANT c_ACQ_NUM_CORES : NATURAL := c_RTM_LAMP_NUM_CORES + c_NUM_SYS_ID_CORES;

-- Acquisition core IDs
constant c_ACQ_CORE_RTM_LAMP_ID : natural := 0;
constant c_ACQ_CORE_CC_FMC_OR_RTM_ID : natural := 1;
constant c_ACQ_CORE_CC_P2P_ID : natural := 2;
constant c_ACQ_CORE_SYS_ID_ID : natural := 3;
CONSTANT c_ACQ_CORE_RTM_LAMP_ID : NATURAL := 0;
CONSTANT c_ACQ_CORE_SYS_ID_ID : NATURAL := 1;

-- Type of DDR3 core interface
constant c_DDR_INTERFACE_TYPE : string := "AXIS";
Expand Down Expand Up @@ -807,10 +805,8 @@ architecture top of afc_ref_fofb_ctrl_gen is

-- Trigger core IDs
-- These IDs should be kept in sync with the ACQ core IDs
constant c_TRIG_MUX_RTM_LAMP_ID : natural := c_ACQ_CORE_RTM_LAMP_ID;
constant c_TRIG_MUX_CC_FMC_ID : natural := c_ACQ_CORE_CC_FMC_OR_RTM_ID;
constant c_TRIG_MUX_CC_P2P_ID : natural := c_ACQ_CORE_CC_P2P_ID;
constant c_TRIG_MUX_SYS_ID_ID : natural := c_ACQ_CORE_SYS_ID_ID;
CONSTANT c_TRIG_MUX_RTM_LAMP_ID : NATURAL := c_ACQ_CORE_RTM_LAMP_ID;
CONSTANT c_TRIG_MUX_SYS_ID_ID : NATURAL := c_ACQ_CORE_SYS_ID_ID;

constant c_TRIG_MUX_NUM_CORES : natural := c_ACQ_NUM_CORES;

Expand Down Expand Up @@ -1537,10 +1533,6 @@ begin

end generate;

-- Trigger signal for DCC timeframe_start.
-- Trigger pulses are synch'ed with the respective fs_clk
fai_sim_trigger(c_FOFB_CC_FMC_OR_RTM_ID) <= trig_pulse_rcv(c_TRIG_MUX_CC_FMC_ID, c_TRIG_MUX_FOFB_SYNC_ID).pulse;

cmp_fofb_ctrl_wrapper_0 : xwb_fofb_ctrl_wrapper
generic map
(
Expand Down Expand Up @@ -1699,10 +1691,6 @@ begin
fofb_ref_clk_p(c_FOFB_CC_P2P_ID) <= clk_fp2_clk1_p;
fofb_ref_clk_n(c_FOFB_CC_P2P_ID) <= clk_fp2_clk1_n;

-- Trigger signal for DCC timeframe_start.
-- Trigger pulses are synch'ed with the respective fs_clk
fai_sim_trigger(c_FOFB_CC_P2P_ID) <= trig_pulse_rcv(c_TRIG_MUX_CC_P2P_ID, c_TRIG_MUX_FOFB_SYNC_ID).pulse;

cmp_fofb_ctrl_wrapper_1 : xwb_fofb_ctrl_wrapper
generic map
(
Expand Down Expand Up @@ -2254,12 +2242,6 @@ begin
-- Acquisition --
----------------------------------------------------------------------

fs_clk_array(c_ACQ_CORE_CC_FMC_OR_RTM_ID) <= clk_sys;
fs_rst_n_array(c_ACQ_CORE_CC_FMC_OR_RTM_ID) <= clk_sys_rstn;

fs_clk_array(c_ACQ_CORE_CC_P2P_ID) <= fofb_userclk(c_FOFB_CC_P2P_ID);
fs_rst_n_array(c_ACQ_CORE_CC_P2P_ID) <= fofb_userrst_n(c_FOFB_CC_P2P_ID);

fs_clk_array(c_ACQ_CORE_RTM_LAMP_ID) <= clk_sys;
fs_rst_n_array(c_ACQ_CORE_RTM_LAMP_ID) <= clk_sys_rstn;

Expand Down Expand Up @@ -2320,26 +2302,6 @@ begin
-- ACQ Core 1
--------------------

-- DCC FMC
acq_chan_array(c_ACQ_CORE_CC_FMC_OR_RTM_ID, c_ACQ_DCC_ID).val(to_integer(c_FACQ_CHANNELS(c_ACQ_DCC_ID).width)-1 downto 0) <=
std_logic_vector(fofb_proc_sp_arr(6)) & std_logic_vector(fofb_proc_sp_arr(7)) & std_logic_vector(fofb_proc_sp_arr(4)) & std_logic_vector(fofb_proc_sp_arr(5)) &
std_logic_vector(fofb_proc_sp_arr(2)) & std_logic_vector(fofb_proc_sp_arr(3)) & std_logic_vector(fofb_proc_sp_arr(0)) & std_logic_vector(fofb_proc_sp_arr(1)) & f_fofb_cc_packet_to_slv(acq_dcc_fmc_packet);
acq_chan_array(c_ACQ_CORE_CC_FMC_OR_RTM_ID, c_ACQ_DCC_ID).dvalid <= acq_dcc_fmc_valid;
acq_chan_array(c_ACQ_CORE_CC_FMC_OR_RTM_ID, c_ACQ_DCC_ID).trig <= trig_pulse_rcv(c_TRIG_MUX_CC_FMC_ID, c_ACQ_DCC_ID).pulse; -- TODO: is this on the right clock domain?

--------------------
-- ACQ Core 2
--------------------
-- DCC P2P
acq_chan_array(c_ACQ_CORE_CC_P2P_ID, c_ACQ_DCC_ID).val(to_integer(c_FACQ_CHANNELS(c_ACQ_DCC_ID).width)-1 downto 0) <=
std_logic_vector(to_unsigned(0, 128)) & fofb_fod_dat(c_FOFB_CC_P2P_ID);
acq_chan_array(c_ACQ_CORE_CC_P2P_ID, c_ACQ_DCC_ID).dvalid <= fofb_fod_dat_val(c_FOFB_CC_P2P_ID)(0);
acq_chan_array(c_ACQ_CORE_CC_P2P_ID, c_ACQ_DCC_ID).trig <= trig_pulse_rcv(c_TRIG_MUX_CC_P2P_ID, c_ACQ_DCC_ID).pulse;

--------------------
-- ACQ Core 3
--------------------

-- SYS ID channel
acq_chan_array(c_ACQ_CORE_SYS_ID_ID, c_ACQ_SYS_ID_ID).val(to_integer(c_FACQ_CHANNELS(c_ACQ_SYS_ID_ID).width)-1 downto 0) <=
std_logic_vector(to_unsigned(0, 287)) & -- [DEBUG] Padding with 0s (1023 downto 737)
Expand Down Expand Up @@ -2401,34 +2363,12 @@ begin
trig_ref_clk <= clk_trig_ref;
trig_ref_rst_n <= clk_trig_ref_rstn;

-- Assign trigger pulses to trigger channel interfaces
trig_acq_channel(c_TRIG_MUX_CC_FMC_ID, c_TRIG_RCV_INTERN_CHAN_0_ID).pulse <=
timeframe_start(c_FOFB_CC_FMC_OR_RTM_ID);
trig_acq_channel(c_TRIG_MUX_CC_FMC_ID, c_TRIG_RCV_INTERN_CHAN_1_ID).pulse <=
timeframe_end(c_FOFB_CC_FMC_OR_RTM_ID);

trig_acq_channel(c_TRIG_MUX_CC_P2P_ID, c_TRIG_RCV_INTERN_CHAN_0_ID).pulse <=
timeframe_start(c_FOFB_CC_P2P_ID);
trig_acq_channel(c_TRIG_MUX_CC_P2P_ID, c_TRIG_RCV_INTERN_CHAN_1_ID).pulse <=
timeframe_end(c_FOFB_CC_P2P_ID);

-- FIXME: remove it
-- trig_acq_channel(c_TRIG_MUX_RTM_LAMP_ID, c_TRIG_RCV_INTERN_CHAN_0_ID).pulse <=
-- rtmlamp_adc_start;
-- trig_acq_channel(c_TRIG_MUX_RTM_LAMP_ID, c_TRIG_RCV_INTERN_CHAN_1_ID).pulse <=
-- rtmlamp_dac_start;

-- Assign intern triggers to trigger module
trig_rcv_intern(c_TRIG_MUX_CC_FMC_ID, c_TRIG_RCV_INTERN_CHAN_0_ID) <=
trig_acq_channel(c_TRIG_MUX_CC_FMC_ID, c_TRIG_RCV_INTERN_CHAN_0_ID);
trig_rcv_intern(c_TRIG_MUX_CC_FMC_ID, c_TRIG_RCV_INTERN_CHAN_1_ID) <=
trig_acq_channel(c_TRIG_MUX_CC_FMC_ID, c_TRIG_RCV_INTERN_CHAN_1_ID);

trig_rcv_intern(c_TRIG_MUX_CC_P2P_ID, c_TRIG_RCV_INTERN_CHAN_0_ID) <=
trig_acq_channel(c_TRIG_MUX_CC_P2P_ID, c_TRIG_RCV_INTERN_CHAN_0_ID);
trig_rcv_intern(c_TRIG_MUX_CC_P2P_ID, c_TRIG_RCV_INTERN_CHAN_1_ID) <=
trig_acq_channel(c_TRIG_MUX_CC_P2P_ID, c_TRIG_RCV_INTERN_CHAN_1_ID);

trig_rcv_intern(c_TRIG_MUX_RTM_LAMP_ID, c_TRIG_RCV_INTERN_CHAN_0_ID) <=
trig_acq_channel(c_TRIG_MUX_RTM_LAMP_ID, c_TRIG_RCV_INTERN_CHAN_0_ID);
trig_rcv_intern(c_TRIG_MUX_RTM_LAMP_ID, c_TRIG_RCV_INTERN_CHAN_1_ID) <=
Expand Down

0 comments on commit 899c0d9

Please sign in to comment.