Implement AAC instruction

lyrakisk · Nov 6, 2024 · 201dac7 · 201dac7
1 parent 675c9ad
commit 201dac7
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Showing 2 changed files with 33 additions and 11 deletions.
diff --git a/src/cpu/instructions.rs b/src/cpu/instructions.rs
@@ -82,6 +82,7 @@ pub struct InstructionResult {
 impl Instruction {
     pub fn execute(&self, cpu: &mut CPU) -> InstructionResult {
         match self.name {
+            "AAC" => aac(self, cpu),
             "ADC" => adc(self, cpu),
             "AND" => and(self, cpu),
             "ASL" => asl(self, cpu),
@@ -301,20 +302,22 @@ pub static INSTRUCTIONS: Lazy<HashMap<u8, Instruction>> = Lazy::new(|| {
         Instruction {opcode: 0x98, name: "TYA", bytes: 1, addressing_mode: AddressingMode::Implicit, cycles: 2},
 
         // Illegal Opcodes
+        Instruction {opcode: 0x0b, name: "AAC", bytes: 2, addressing_mode: AddressingMode::Immediate, cycles: 2},
+        Instruction {opcode: 0x2b, name: "AAC", bytes: 2, addressing_mode: AddressingMode::Immediate, cycles: 2},
         Instruction {opcode: 0x04, name: "DOP", bytes: 2, addressing_mode: AddressingMode::ZeroPage, cycles: 3},
-        Instruction {opcode: 0x14, name: "DOP", bytes: 2, addressing_mode: AddressingMode::ZeroPage, cycles: 4},
-        Instruction {opcode: 0x34, name: "DOP", bytes: 2, addressing_mode: AddressingMode::ZeroPage, cycles: 4},
+        Instruction {opcode: 0x14, name: "DOP", bytes: 2, addressing_mode: AddressingMode::ZeroPage_X, cycles: 4},
+        Instruction {opcode: 0x34, name: "DOP", bytes: 2, addressing_mode: AddressingMode::ZeroPage_X, cycles: 4},
         Instruction {opcode: 0x44, name: "DOP", bytes: 2, addressing_mode: AddressingMode::ZeroPage, cycles: 3},
-        Instruction {opcode: 0x54, name: "DOP", bytes: 2, addressing_mode: AddressingMode::ZeroPage, cycles: 4},
+        Instruction {opcode: 0x54, name: "DOP", bytes: 2, addressing_mode: AddressingMode::ZeroPage_X, cycles: 4},
         Instruction {opcode: 0x64, name: "DOP", bytes: 2, addressing_mode: AddressingMode::ZeroPage, cycles: 3},
-        Instruction {opcode: 0x74, name: "DOP", bytes: 2, addressing_mode: AddressingMode::ZeroPage, cycles: 4},
-        Instruction {opcode: 0x80, name: "DOP", bytes: 2, addressing_mode: AddressingMode::ZeroPage, cycles: 2},
-        Instruction {opcode: 0x82, name: "DOP", bytes: 2, addressing_mode: AddressingMode::ZeroPage, cycles: 2},
-        Instruction {opcode: 0x89, name: "DOP", bytes: 2, addressing_mode: AddressingMode::ZeroPage, cycles: 2},
-        Instruction {opcode: 0xC2, name: "DOP", bytes: 2, addressing_mode: AddressingMode::ZeroPage, cycles: 2},
-        Instruction {opcode: 0xD4, name: "DOP", bytes: 2, addressing_mode: AddressingMode::ZeroPage, cycles: 4},
-        Instruction {opcode: 0xE2, name: "DOP", bytes: 2, addressing_mode: AddressingMode::ZeroPage, cycles: 2},
-        Instruction {opcode: 0xF4, name: "DOP", bytes: 2, addressing_mode: AddressingMode::ZeroPage, cycles: 4},
+        Instruction {opcode: 0x74, name: "DOP", bytes: 2, addressing_mode: AddressingMode::ZeroPage_X, cycles: 4},
+        Instruction {opcode: 0x80, name: "DOP", bytes: 2, addressing_mode: AddressingMode::Immediate, cycles: 2},
+        Instruction {opcode: 0x82, name: "DOP", bytes: 2, addressing_mode: AddressingMode::Immediate, cycles: 2},
+        Instruction {opcode: 0x89, name: "DOP", bytes: 2, addressing_mode: AddressingMode::Immediate, cycles: 2},
+        Instruction {opcode: 0xC2, name: "DOP", bytes: 2, addressing_mode: AddressingMode::Immediate, cycles: 2},
+        Instruction {opcode: 0xD4, name: "DOP", bytes: 2, addressing_mode: AddressingMode::ZeroPage_X, cycles: 4},
+        Instruction {opcode: 0xE2, name: "DOP", bytes: 2, addressing_mode: AddressingMode::Immediate, cycles: 2},
+        Instruction {opcode: 0xF4, name: "DOP", bytes: 2, addressing_mode: AddressingMode::ZeroPage_X, cycles: 4},
         Instruction {opcode: 0x07, name: "SLO", bytes: 2, addressing_mode: AddressingMode::ZeroPage, cycles: 5},
         Instruction {opcode: 0x17, name: "SLO", bytes: 2, addressing_mode: AddressingMode::ZeroPage_X, cycles: 6},
         Instruction {opcode: 0x0F, name: "SLO", bytes: 3, addressing_mode: AddressingMode::Absolute, cycles: 6},
@@ -328,6 +331,23 @@ pub static INSTRUCTIONS: Lazy<HashMap<u8, Instruction>> = Lazy::new(|| {
     .collect()
 });
 
+fn aac(instruction: &Instruction, cpu: &mut CPU) -> InstructionResult {
+    let operand = cpu.get_operand(&instruction.addressing_mode);
+    cpu.register_a = cpu.register_a & operand;
+    cpu.update_zero_flag(cpu.register_a);
+    cpu.update_negative_flag(cpu.register_a);
+    match cpu.get_flag_state(STATUS_FLAG_MASK_NEGATIVE) {
+        FlagStates::SET => {
+            cpu.set_flag(STATUS_FLAG_MASK_CARRY);
+        }
+        FlagStates::CLEAR => {
+            cpu.clear_flag(STATUS_FLAG_MASK_CARRY);
+        }
+    }
+    return InstructionResult {
+        executed_cycles: instruction.cycles,
+    };
+}
 fn adc(instruction: &Instruction, cpu: &mut CPU) -> InstructionResult {
     let mut instruction_result = InstructionResult {
         executed_cycles: instruction.cycles,

diff --git a/src/cpu/mod.rs b/src/cpu/mod.rs
@@ -447,6 +447,7 @@ mod test_cpu {
     #[test_case("submodules/65x02/nes6502/v1/08.json")]
     #[test_case("submodules/65x02/nes6502/v1/09.json")]
     #[test_case("submodules/65x02/nes6502/v1/0a.json")]
+    #[test_case("submodules/65x02/nes6502/v1/0b.json")]
     #[test_case("submodules/65x02/nes6502/v1/0d.json")]
     #[test_case("submodules/65x02/nes6502/v1/0e.json")]
     #[test_case("submodules/65x02/nes6502/v1/0f.json")]
@@ -471,6 +472,7 @@ mod test_cpu {
     #[test_case("submodules/65x02/nes6502/v1/28.json")]
     #[test_case("submodules/65x02/nes6502/v1/29.json")]
     #[test_case("submodules/65x02/nes6502/v1/2a.json")]
+    #[test_case("submodules/65x02/nes6502/v1/2b.json")]
     #[test_case("submodules/65x02/nes6502/v1/2c.json")]
     #[test_case("submodules/65x02/nes6502/v1/2d.json")]
     #[test_case("submodules/65x02/nes6502/v1/2e.json")]